公开(公告)号：US20230077750A1

公开(公告)日：2023-03-16

申请号：US17473162

申请日：2021-09-13

Applicant: Intel Corporation

Inventor： Tanay KARNIK ,  Dileep KURIAN ,  Bradley JACKSON ,  Srivatsa RANGACHAR SRINIVASA ,  Jainaveen SUNDARAM PRIYA ,  Adel A. ELSHERBINI

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

Abstract: Embodiments disclosed herein include die modules. In an embodiment, a die module comprises a plurality of first dies, and a second die under the plurality of first dies. In an embodiment, the second die is coupled to individual ones of the plurality of first dies. In an embodiment, the second die comprises a plurality of mesh stops, and conductive routing to electrically couple the mesh stops together.

公开(公告)号：US20220391128A1

公开(公告)日：2022-12-08

申请号：US17340866

申请日：2021-06-07

Applicant: Intel Corporation

Inventor： Saurabh JAIN ,  Srivatsa RANGACHAR SRINIVASA ,  Akshay Krishna RAMANATHAN ,  Gurpreet Singh KALSI ,  Kamlesh R. PILLAI ,  Sreenivas SUBRAMONEY

IPC: G06F3/06 ,  G06F7/523

Abstract: Example compute-in-memory (CIM) or processor-in-memory (PIM) techniques using repurposed or dedicated static random access memory (SRAM) rows of an SRAM sub-array to store look-up-table (LUT) entries for use in a multiply and accumulate (MAC) operation.