公开(公告)号：US11587874B2

公开(公告)日：2023-02-21

申请号：US16799448

申请日：2020-02-24

Applicant: Intel Corporation

Inventor： Sung-Taeg Kang ,  Pranav Kalavade ,  Owen W. Jungroth ,  Prasanna Srinivasan

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L23/532 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/528

Abstract: Apparatus, systems, or methods for a memory array having a plurality of word lines. A word line includes at least one word line plate, and the word line plate comprises a first material with a first resistivity. An edge of the word line plate is recessed and filled with a second material having a second resistivity that is lower than the first resistivity. As a result, the total resistance of the word line may be reduced compared to a word line using only the first material with the first resistivity. Other embodiments may also be described and claimed.

公开(公告)号：US20210265278A1

公开(公告)日：2021-08-26

申请号：US16799448

申请日：2020-02-24

Applicant: Intel Corporation

Inventor： Sung-Taeg Kang ,  Pranav Kalavade ,  Owen W. Jungroth ,  Prasanna Srinivasan

IPC: H01L23/532 ,  H01L23/528 ,  H01L27/11556 ,  H01L27/11582 ,  H01L21/768 ,  H01L21/3205

Abstract: Apparatus, systems, or methods for a memory array having a plurality of word lines. A word line includes at least one word line plate, and the word line plate comprises a first material with a first resistivity. An edge of the word line plate is recessed and filled with a second material having a second resistivity that is lower than the first resistivity. As a result, the total resistance of the word line may be reduced compared to a word line using only the first material with the first resistivity. Other embodiments may also be described and claimed.