公开(公告)号：US20200187352A1

公开(公告)日：2020-06-11

申请号：US16662717

申请日：2019-10-24

Applicant: Intel Corporation

Inventor： Wei Jern Tan ,  Tony Lewis

IPC: H05K1/11 ,  H05K1/02

Abstract: To reduce the effect of undesirable electrical resonances in via stubs (e.g., portions of electrically conductive material in a via that form an open circuit by electrically connecting at only one end), a multi-layer printed circuit board can electrically connect traces in different layers using two vias that are electrically connected to each other. For example, a first electrical trace can electrically connect to a first via at a first layer, the first via can electrically connect to a second via at the topmost layer (or the bottommost layer), and the second via can electrically connect to a second electrical trace at a second layer. Compared to a typical single-via connection scheme, the two-via connection scheme can produce stubs that are shorter in length and therefore have an increased resonant frequency that may avoid interference with electrical signals sent through the first and second electrical traces.