公开(公告)号：US20220382465A1

公开(公告)日：2022-12-01

申请号：US17818161

申请日：2022-08-08

Applicant: Intel Corporation

Inventor： Rakan Maddah ,  Jason Gayman ,  Arjun Kripanidhi ,  Wilson Fang ,  Prashant S. Damle

IPC: G06F3/06

Abstract: Systems, apparatuses and methods may provide for technology that determines a write-to-write delay with respect to a memory cell, wherein one or more neighboring cells are adjacent to the memory cell and controls a write disturb refresh rate of the one or more neighboring cells based on the write-to-write delay. In one example, the technology increments a write counter corresponding to the memory cell by a first value if the write-to-write delay exceeds a delay threshold and increments the write counter by a second value if the write-to-write delay does not exceed the delay threshold, wherein the second value is greater than the first value, and wherein the write disturb refresh rate is controlled based on the write counter.