公开(公告)号：US20210104459A1

公开(公告)日：2021-04-08

申请号：US16464565

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： BALIJEET S. BAINS ,  CHARLES H. WALLACE ,  ZHANPING CHEN

IPC: H01L23/525 ,  H01L21/768 ,  H01L21/02 ,  H01L23/528 ,  H01L23/532

Abstract: Embodiments herein describe techniques for fuse lines and plugs formation. A semiconductor device may include a fuse line having a nominal fuse segment abutted to a necked fuse segment. The nominal fuse segment may be wider than the necked fuse segment. A first spacer may be along a first side of the fuse line and a second spacer along a second side opposite to the first side of the fuse line. The first spacer may include a part having a width at least twice a width of a part of the second spacer. A plug within a vicinity of the necked fuse segment may have a plug width that may be at least twice a plug with of a plug of an interconnect line outside the vicinity. Other embodiments may also be described and claimed.