公开(公告)号：US20170086153A1

公开(公告)日：2017-03-23

申请号：US14859404

申请日：2015-09-21

Applicant: Intel IP Corporation

Inventor： Dae Jung YOON ,  Bertram GUNZELMANN ,  ANSGAR SCHERB

IPC: H04W56/00 ,  H04L5/00 ,  H04W4/02

CPC classification number: H04W56/001 ,  H04L5/0007 ,  H04W4/02

Abstract: A mobile terminal device includes a receiver circuit and a processing circuit. The receiver circuit is configured to receive a plurality of reference signal patterns from a plurality of transmission locations, wherein each of the plurality of reference signal patterns corresponds to a respective transmission location of the plurality of transmission locations. The processing circuit is configured to determine a synchronization offset estimate for each of the plurality of transmission locations based on the plurality of reference signal patterns to generate a plurality of synchronization offset estimates; determine if a minimum-valued synchronization offset estimate of the plurality of synchronization offset estimates satisfies predefined criteria; and determine a reception time window for processing data based on the minimum-valued synchronization offset estimate if the minimum-valued synchronization offset estimate satisfies the predefined criteria.