Semiconductor device including a gate insulating film having a metal oxide layer having trap levels
    1.
    发明授权
    Semiconductor device including a gate insulating film having a metal oxide layer having trap levels 有权
    半导体器件包括具有陷阱电平的金属氧化物层的栅极绝缘膜

    公开(公告)号:US08476718B2

    公开(公告)日:2013-07-02

    申请号:US12710851

    申请日:2010-02-23

    IPC分类号: H01L21/02

    摘要: A semiconductor device includes a MISFET comprising: a semiconductor layer including a semiconductor region formed therein; a gate insulating film formed above the semiconductor region, and including a metal oxide layer containing a metal and oxygen, the metal contained in the metal oxide layer being at least one selected from Hf and Zr, the metal oxide layer further including at least one element selected from the group consisting of Ru, Cr, Os, V, Tc, and Nb, the metal oxide layer having sites that capture or release charges formed by inclusion of the element, density of the element in the metal oxide layer being in the range of 1×1015 cm−3 to 2.96×1020 cm−3, the sites being distributed to have a peak closer to the semiconductor region than to a center of the metal oxide layer; and a gate electrode formed on the gate insulating film.

    摘要翻译: 半导体器件包括:MISFET,包括:半导体层,包括形成在其中的半导体区域; 形成在所述半导体区域上方的栅极绝缘膜,并且包括含有金属和氧的金属氧化物层,所述金属氧化物层中所含的金属为选自Hf和Zr中的至少一种,所述金属氧化物层还包含至少一种元素 选自Ru,Cr,Os,V,Tc和Nb的金属氧化物层,金属氧化物层具有捕获或释放由元素包含形成的电荷的部位,金属氧化物层中的元素的密度在该范围内 1×1015cm-3至2.96×1020cm-3,这些位置被分配成具有比金属氧化物层的中心更靠近半导体区域的峰; 以及形成在栅极绝缘膜上的栅电极。

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20100244157A1

    公开(公告)日:2010-09-30

    申请号:US12710851

    申请日:2010-02-23

    IPC分类号: H01L29/78

    摘要: A semiconductor device includes a MISFET comprising: a semiconductor layer including a semiconductor region formed therein; a gate insulating film formed above the semiconductor region, and including a metal oxide layer containing a metal and oxygen, the metal contained in the metal oxide layer being at least one selected from Hf and Zr, the metal oxide layer further including at least one element selected from the group consisting of Ru, Cr, Os, V, Tc, and Nb, the metal oxide layer having sites that capture or release charges formed by inclusion of the element, density of the element in the metal oxide layer being in the range of 1×1015 cm−3 to 2.96×1020 cm−3, the sites being distributed to have a peak closer to the semiconductor region than to a center of the metal oxide layer; and a gate electrode formed on the gate insulating film.

    摘要翻译: 半导体器件包括:MISFET,包括:半导体层,包括形成在其中的半导体区域; 形成在所述半导体区域上方的栅极绝缘膜,并且包括含有金属和氧的金属氧化物层,所述金属氧化物层中所含的金属为选自Hf和Zr中的至少一种,所述金属氧化物层还包含至少一种元素 选自Ru,Cr,Os,V,Tc和Nb的金属氧化物层,金属氧化物层具有捕获或释放由元素包含形成的电荷的部位,金属氧化物层中的元素的密度在该范围内 1×1015cm-3至2.96×1020cm-3,这些位置被分配成具有比金属氧化物层的中心更靠近半导体区域的峰; 以及形成在栅极绝缘膜上的栅电极。