公开(公告)号：US20140122826A1

公开(公告)日：2014-05-01

申请号：US14138977

申请日：2013-12-23

Applicant: JUNIPER NETWORKS, INC.

Inventor： Samuel JACOB ,  Vijay PAUL

IPC: G06F12/10

CPC classification number: G06F12/10 ,  G06F11/073 ,  G06F11/0763

Abstract: A device identifies, based on a program code instruction, an attempted write access operation to a fenced memory slab, where the fenced memory slab includes an alternating sequence of data buffers and guard buffers. The device assigns read-only protection to the fenced slab and invokes, based on the attempted write access operation, a page fault operation. When a faulting address of the attempted write operation is not an address for one of the multiple data buffers, the device performs a panic routine. When the faulting address of the attempted write operation is an address for one of the multiple data buffers, the device removes the read-only protection for the fenced slab and performs a single step processing routine for the program code instruction.

Abstract translation: 设备基于程序代码指令识别对有围栏的存储器板的尝试的写入访问操作，其中有围栏的存储器板包括数据缓冲器和保护缓冲器的交替序列。 设备为防护板分配只读保护，并根据尝试的写访问操作调用页故障操作。 当尝试的写入操作的故障地址不是多个数据缓冲器之一的地址时，设备执行紧急程序。 当尝试的写入操作的故障地址是多个数据缓冲器中的一个的地址时，该设备移除防护板的只读保护，并对程序代码指令执行单步处理程序。