公开(公告)号：US09411743B2

公开(公告)日：2016-08-09

申请号：US14138977

申请日：2013-12-23

Applicant: JUNIPER NETWORKS, INC.

Inventor： Samuel Jacob ,  Vijay Paul

IPC: G06F11/00 ,  G06F12/10 ,  G06F11/07

CPC classification number: G06F12/10 ,  G06F11/073 ,  G06F11/0763

Abstract: A device identifies, based on a program code instruction, an attempted write access operation to a fenced memory slab, where the fenced memory slab includes an alternating sequence of data buffers and guard buffers. The device assigns read-only protection to the fenced slab and invokes, based on the attempted write access operation, a page fault operation. When a faulting address of the attempted write operation is not an address for one of the multiple data buffers, the device performs a panic routine. When the faulting address of the attempted write operation is an address for one of the multiple data buffers, the device removes the read-only protection for the fenced slab and performs a single step processing routine for the program code instruction.