公开(公告)号：US20070090484A1

公开(公告)日：2007-04-26

申请号：US11162027

申请日：2005-08-25

申请人： Jae Gon Lee ,  Cher Sian Chua ,  Chew Hoe Ang ,  Liang-Choo Hsia

发明人： Jae Gon Lee ,  Cher Sian Chua ,  Chew Hoe Ang ,  Liang-Choo Hsia

IPC分类号： H01L29/00

CPC分类号： H01L21/823807 ,  H01L21/823878 ,  H01L29/7842

摘要： An integrated circuit stress control system is provided. A gate is formed on a substrate and a channel is formed in the substrate. A source/drain is formed around the gate. A shallow trench isolation is formed in the substrate, the shallow trench isolation producing strain on the channel. A stress suppressing feature is formed in the substrate.

摘要翻译： 提供集成电路应力控制系统。 栅极形成在衬底上，并且沟道形成在衬底中。 源极/漏极围绕栅极形成。 在衬底中形成浅沟槽隔离，通道上的浅沟槽隔离产生应变。 在基板上形成应力抑制特征。

公开(公告)号：US07268048B2

公开(公告)日：2007-09-11

申请号：US10913214

申请日：2004-08-06

申请人： Yin-Min Felicia Goh ,  Simon Chooi ,  Teck Wee Lim ,  Vincent Sih ,  Chian Yuh Sin ,  Ping Yu Ee ,  Zainab Ismail ,  Cher Sian Chua

发明人： Yin-Min Felicia Goh ,  Simon Chooi ,  Teck Wee Lim ,  Vincent Sih ,  Chian Yuh Sin ,  Ping Yu Ee ,  Zainab Ismail ,  Cher Sian Chua

IPC分类号： H01L21/4763 ,  H01L21/44 ,  H01L21/302

CPC分类号： H01L21/02057 ,  H01L21/02068 ,  H01L21/28518 ,  H01L21/76237 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/665 ,  H01L29/7833

摘要： Methods of preparing conductive regions such as source/drain regions for silicidation procedures, has been developed. The methods feature removal of native oxide as well as removal of deposited arsenic based defects from conductive surfaces prior to deposition of a metal component of subsequently formed metal silicide regions. Arsenic ions implanted for N type source/drain regions are also implanted into insulator regions such as insulator filled shallow trench isolation regions. A hydrofluoric acid cycle used as a component of the pre-silicidation preparation procedure can release arsenic from the shallow trench isolation regions in the form of arsenic based defects, which in turn can re-deposit on the surface of source/drain region. Therefore pre-silicidation preparation treatments described in this invention feature removal of both native oxide and arsenic based defects from conductive surfaces prior to metal silicide formation. Methods include wet etch procedures featuring hydrofluoric acid and hydrogen peroxide, as well as spin dry and dry etch procedures both employed post hydrofluoric acid treatment to remove re-deposited arsenic based defects.

摘要翻译： 已经开发了制备用于硅化程序的源极/漏极区域的导电区域的方法。 该方法在沉积随后形成的金属硅化物区域的金属组分之前，特征在于去除自然氧化物以及从导电表面去除沉积的基于砷的缺陷。 注入用于N型源极/漏极区域的砷离子也被注入绝缘体区域，例如绝缘体填充的浅沟槽隔离区域。 用作预硅化物制备方法的组分的氢氟酸循环可以以基于砷的缺陷的形式从浅沟槽隔离区释放砷，其又可以沉积在源极/漏极区的表面上。 因此，本发明中描述的预硅化制备处理在金属硅化物形成之前特征是从导电表面除去天然氧化物和砷的缺陷。 方法包括以氢氟酸和过氧化氢为特征的湿法蚀刻程序，以及在氢氟酸处理之后采用的旋转干燥和干蚀刻方法，以去除重新沉积的基于砷的缺陷。