摘要:
Disclosed herein is an internal voltage generation circuit of a semiconductor memory device which is capable of supplying voltages of different levels to a column path & control logic and data path & control logic in the memory device according to different operation modes of the memory device. The column path & control logic and data path & control logic are applied with a normal operating voltage when they are involved in the current operation mode of the memory device, whereas with a lower voltage when they are not involved. Therefore, the present invention has the effect of efficiently managing internal voltages of the semiconductor memory device and reducing current leakage of the memory device and, in turn, unnecessary power consumption thereof.
摘要:
A method for controlling a precharge timing of a memory device is disclosed. The method includes making timing of generation of a signal for determining a precharge timing in a normal operation and a signal for determining a precharge timing in a refresh operation different from each other by making timing of generation of a signal for controlling the normal operation and a signal for controlling the refresh operation different from each other.
摘要:
An internal voltage generator capable of reducing the variation width in the level of an internal voltage VPP, by performing charge pumping only a predetermined number of times in a period where an oscillator driving signal is at a logic HIGH level, and then stopping the charge pumping operation. The oscillator controller generates an oscillation control signal for stopping an oscillation operation of a ring oscillator by using an output signal of a level detector and an output signal of the ring oscillator. The ring oscillator does not generate an oscillation signal at a predetermined time point where an output signal of the level detector is at a HIGH level in response to the oscillation control signal. The charge pump circuit generates an internal voltage by performing a charge pumping operation only predetermined times in response to the oscillation signal, and then stopping the charge pumping operation.
摘要:
An internal voltage generator capable of reducing the variation width in the level of an internal voltage VPP, by performing charge pumping only a predetermined number of times in a period where an oscillator driving signal is at a logic HIGH level, and then stopping the charge pumping operation. The oscillator controller generates an oscillation control signal for stopping an oscillation operation of a ring oscillator by using an output signal of a level detector and an output signal of the ring oscillator. The ring oscillator does not generate an oscillation signal at a predetermined time point where an output signal of the level detector is at a HIGH level in response to the oscillation control signal. The charge pump circuit generates an internal voltage by performing a charge pumping operation only predetermined times in response to the oscillation signal, and then stopping the charge pumping operation.