公开(公告)号：US06788596B2

公开(公告)日：2004-09-07

申请号：US10347181

申请日：2003-01-21

申请人： Jae-Hoon Kim ,  Dong-Il Seo ,  Hyo-Jin Oh

发明人： Jae-Hoon Kim ,  Dong-Il Seo ,  Hyo-Jin Oh

IPC分类号： G11C700

CPC分类号： G11C29/785 ,  G11C29/72 ,  G11C2029/1208

摘要： A semiconductor memory device and a failed cell address programming circuit usable therein. The semiconductor memory device as packaged includes a memory cell array having a plurality of memory cells accessed by an internal address, a plurality of redundant memory cells accessed by a failed cell address of a failed memory cell for repairing a failed memory cell, a comparator for comparing data output from the memory cells during testing the semiconductor memory device as packaged and generating a comparative correspondence signal, a mode setting register for storing an externally applied failed cell address programming control signal in response to a mode control signal, an address generating circuit for generating the internal address by buffering and latching an externally applied address, a failed cell address programming circuit for latching the internal address output from the address generating circuit in response to the failed cell address programming control signal when the comparative accordance signal indicates that a failed memory cell is detected and programming the failed cell address which is an address for accessing the failed memory cell; and a failed cell address decoding circuit for generating a redundant selection signal when the internal address output from the address generating circuit and the failed cell address output from the failed cell address programming correspond.

摘要翻译： 半导体存储器件和可用于其中的故障单元地址编程电路。 封装的半导体存储器件包括具有由内部地址访问的多个存储器单元的存储单元阵列，由故障存储器单元的故障单元地址访问的多个冗余存储器单元，用于修复故障存储单元，比较器 比较在封装半导体存储器件的测试期间从存储器单元输出的数据，并产生比较对应信号;模式设置寄存器，用于响应于模式控制信号存储外部施加的故障单元地址编程控制信号;地址产生电路， 通过缓冲和锁存外部施加的地址来产生内部地址，一个故障的单元地址编程电路，用于当比较的一致信号指示故障存储器时，响应于故障的单元地址编程控制信号来锁存从地址产生电路输出的内部地址 单元被检测和编程t 他失败的单元地址是访问失败的存储单元的地址; 以及当从地址产生电路输出的内部地址和从故障单元地址编程输出的故障单元地址对应时，产生冗余选择信号的故障单元地址解码电路。