公开(公告)号：US5898882A

公开(公告)日：1999-04-27

申请号：US1865

申请日：1993-01-08

申请人： James Allan Kahle ,  Chin-Cheng Kau ,  Aubrey Deene Ogden ,  Ali Asghar Poursepanj ,  Paul Kang-Guo Tu ,  Donald Emil Waldecker

发明人： James Allan Kahle ,  Chin-Cheng Kau ,  Aubrey Deene Ogden ,  Ali Asghar Poursepanj ,  Paul Kang-Guo Tu ,  Donald Emil Waldecker

IPC分类号： G06F9/38 ,  G06F15/16

CPC分类号： G06F9/3836 ,  G06F9/384 ,  G06F9/3855

摘要： A method and system for permitting single cycle instruction dispatch in a superscalar processor system which dispatches multiple instructions simultaneously to a group of execution units for execution and placement of results thereof within specified general purpose registers. Each instruction generally includes at least one source operand and one destination operand. A plurality of intermediate storage buffers are provided and each time an instruction is dispatched to an available execution unit, a particular one of the intermediate storage buffers is assigned to any destination operand within the dispatched instruction, permitting the instruction to be dispatched within a single cycle by eliminating any requirement for determining and selecting the specified general purpose register or a designated alternate general purpose register.

摘要翻译： 一种用于在超标量处理器系统中允许单周期指令调度的方法和系统，其将多个指令同时分配到一组执行单元以执行并将其结果放置在指定的通用寄存器内。 每个指令通常包括至少一个源操作数和一个目的操作数。 提供多个中间存储缓冲器，并且每当将指令分派到可用执行单元时，中间存储缓冲器中的特定一个被分配给调度指令内的任何目的地操作数，允许在单个周期内发送指令 通过消除对确定和选择指定的通用寄存器或指定的备用通用寄存器的任何要求。

公开(公告)号：US5764942A

公开(公告)日：1998-06-09

申请号：US689437

申请日：1996-08-12

申请人： James Allan Kahle ,  Chin-Cheng Kau ,  Aubrey Deene Ogden ,  Ali Asghar Poursepanj ,  Paul Kang-Guo Tu ,  Donald Emil Waldecker

发明人： James Allan Kahle ,  Chin-Cheng Kau ,  Aubrey Deene Ogden ,  Ali Asghar Poursepanj ,  Paul Kang-Guo Tu ,  Donald Emil Waldecker

IPC分类号： G06F9/38 ,  G06F9/30 ,  G06F9/312

CPC分类号： G06F9/3836 ,  G06F9/384 ,  G06F9/3855

摘要： The method and system of the present invention permits enhanced instruction dispatch efficiency in a superscalar processor system capable of fetching an application specified ordered sequence of scalar instructions and simultaneously dispatching a group of the scalar instructions to a plurality of execution units on a nonsequential opportunistic basis. A group of scalar instructions fetched in an application specified ordered sequence on a nonsequential opportunistic basis is processed in the present invention. The present invention detects conditions requiring serialization during the processing. In response to a detection of a condition requiring serialization, processing of particular scalar instructions from the group of scalar instructions are selectively controlled, wherein at least a portion of the scalar instructions within the group of scalar instructions are thereafter processed in a serial fashion.

摘要翻译： 本发明的方法和系统允许在能够提取应用指定的标量指令的有序序列的超标量处理器系统中增强指令调度效率，并且以非顺序的机会主义的方式在多个执行单元上同时分派一组标量指令。 在本发明中处理以应用程序指定的顺序序列在非顺序机会性基础上提取的一组标量指令。 本发明检测在处理期间需要串行化的条件。 响应于需要串行化的条件的检测，选择性地控制来自标准指令组的特定标量指令的处理，其中标量指令组中的标量指令的至少一部分此后以串行方式被处理。