公开(公告)号：US5367206A

公开(公告)日：1994-11-22

申请号：US78711

申请日：1993-06-17

Applicant: James Yu ,  Tiao-Huo Kuo

Inventor： James Yu ,  Tiao-Huo Kuo

IPC: G11C17/00 ,  G11C16/06 ,  H03K17/16

CPC classification number: H03K17/164

Abstract: An output buffer circuit is disclosed that operates in low voltage applications but can be programmed using standard programmers at high voltage. The output buffer circuit provides for detecting a program verify logic signal from the programmer and slowing the output driver transistors when that signal is detected. In so doing, the noise problems associated with the higher voltages of programming a EPROM device are eliminated while at the same time allowing the output buffer circuit to operate at the required performance levels during normal operation.

Abstract translation: 公开了一种在低电压应用中工作的输出缓冲器电路，但可以使用高电压的标准编程器进行编程。 输出缓冲电路用于检测来自编程器的程序验证逻辑信号，并在检测到该信号时减慢输出驱动晶体管的输出。 在这样做时，消除了与EPROM器件编程的较高电压相关的噪声问题，同时允许输出缓冲器电路在正常操作期间以所需的性能水平运行。