摘要:
In one embodiment, a method for evaluating code usage includes monitoring instructions executed by a processor, counting instances of execution of each instruction, correlating the executed instructions with source code instructions, and providing an indication of source code usage to a user.
摘要:
In one embodiment, a method for evaluating code usage includes monitoring instructions executed by a processor, counting instances of execution of each instruction, correlating the executed instructions with source code instructions, and providing an indication of source code usage to a user.
摘要:
The inventive multiple partition computer system allows the reconfiguration of the installed hardware, possibly while the various partitions continue normal operations. This aspect includes adding and removing process cell boards and I/O from partitions which may or may not continue to run. The invention also allows changes to the association between cells, I/O and partitions. The partitions may be able to stay running, or may have to be shut down from the resulting changes. In the invention, multiple copies of the OS are running independently of each other, each in a partition that has its own cell boards with processors and memory and connected I/O. This provides isolation between different applications. Consequently, a fatal error in one partition would not affect the other partitions. A network of micro-controllers connected to a service processor, via a communications link, provides the service processor with information on each of the different cells, as well as a pathway to receive requests for configuration changes, and a pathway to command changes in the different cells or I/O. The invention allows system control features such as power on/off, status display, etc. for multiple cabinets under control of the service processor.
摘要:
The inventive multiple partition computer system allows the reconfiguration of the installed hardware, possibly while the various partitions continue normal operations. This aspect includes adding and removing process cell boards and I/O from partitions which may or may not continue to run. The invention also allows changes to the association between cells, I/O and partitions. The partitions may be able to stay running, or may have to be shut down from the resulting changes. In the invention, multiple copies of the OS are running independently of each other, each in a partition that has its own cell boards with processors and memory and connected I/O. This provides isolation between different applications. Consequently, a fatal error in one partition would not affect the other partitions. A network of micro-controllers connected to a service processor, via a communications link, provides the service processor with information on each of the different cells, as well as a pathway to receive requests for configuration changes, and a pathway to command changes in the different cells or I/O. The invention allows system control features such as power on/off, status display, etc. for multiple cabinets under control of the service processor.
摘要:
A method and system for independent console access including tracking in a server system allows a plurality of users simultaneous access to any of a plurality of data sources associated with the server. The data sources can be associated with partitions into which the server is divided or can be independent of the partitions. The method and system of the invention also allow a first user of the server to connect to one of the data sources through a tracking mirror, which enables a second user of the server to monitor the movements of the first user by connecting, via the tracking mirror, to the same data source to which the first user connects.
摘要:
Apparatus for executing a conditional branch instruction in a pipelined processing unit which has an instruction queue for storing an instruction stream, address generating apparatus connected to the head of the instruction queue for generating and retaining an address defined in the portion of the instruction stream presently at the head of the instruction queue, and instruction interpretation apparatus which is also connected to the head of the instruction queue for receiving and interpreting an instruction at the head of the instruction queue. A conditional branch instruction which is presently at the head of the instruction queue is executed by first performing a dispatch operation in a first cycle which is the last cycle of execution of the instruction preceding the conditional branch instruction in the instruction queue. The dispatch operation sets up the execution of the instruction at the head of the instruction queue. One result of the dispatch operation is the generation of the address for the target instruction specified in the branch instruction. Thereupon, in an immediately following second cycle, a conditional fetch operation and a test operation are performed. The conditional fetch operation provides the address for the target instruction to the processing unit's memory. The test operation determines whether the branch is to be taken. If the branch is not to be taken, the target instruction is not loaded into the instruction queue, the cycle is extended, and a dispatch operation is performed in the extended cycle. If the branch is to be taken, the target instruction is loaded into the head of the instruction queue in the second cycle. Finally, when the branch is taken, the dispatch operation is performed in an immediately following third cycle.