公开(公告)号：US09116402B2

公开(公告)日：2015-08-25

申请号：US13896725

申请日：2013-05-17

Applicant: Japan Display Inc.

Inventor： Arihiro Takeda ,  Jin Hirosawa ,  Tetsuya Ilzuka ,  Hirokazu Morimoto

IPC: G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/134336 ,  G02F1/133528 ,  G02F1/1337 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/133531 ,  G02F2001/134318 ,  G02F2001/134381 ,  G02F2001/136218 ,  G02F2201/121

Abstract: An array substrate includes a gate line extending in a first direction, a source line extending in a second direction orthogonally crossing the first direction and an auxiliary capacitance line having a trunk portion extending in the first direction so as to cross the source line and a branch portion branched from the trunk portion and extending along the source line. A switching element includes a drain line arranged under the auxiliary capacitance line so as to face the trunk portion and the branch portion thereof. A pixel electrode includes a main pixel electrode extending substantially in parallel to the source line and a contact portion electrically connected with the drain line. A counter substrate includes a couple of main common electrodes extending substantially in parallel to the main pixel electrode on the both sides sandwiching the main pixel electrode.

Abstract translation: 阵列基板包括沿第一方向延伸的栅极线，沿与第一方向正交的第二方向延伸的源极线和具有沿第一方向延伸的主体部分的辅助电容线，以跨越源极线和分支 部分从主体部分分支并沿着源极线延伸。 开关元件包括布置在辅助电容线下方以与主干部分及其分支部分相对的排水线。 像素电极包括基本上平行于源极线延伸的主像素电极和与漏极线电连接的接触部分。 相对基板包括在夹着主像素电极的两侧基本平行于主像素电极延伸的一对主公共电极。