公开(公告)号：US20150028339A1

公开(公告)日：2015-01-29

申请号：US14514798

申请日：2014-10-15

Applicant: c/o Japan Display West Inc.

Inventor： Mitsufumi Sogabe ,  Masaki Murase ,  Hiroshi Mizuhashi

IPC: H01L27/12

CPC classification number: H01L27/124 ,  G02F1/13338 ,  G02F1/13454 ,  G02F1/136286 ,  G02F1/1368 ,  G06F3/038 ,  G06F3/0412 ,  G06F3/044 ,  G06F3/045 ,  H01L23/528 ,  H01L27/1222 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/78648 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including: one or more pieces of first wiring having a main wiring section and a bifurcation wiring section; one or a plurality of pieces of second wiring having a trunk wiring section and a plurality of branch wiring sections within a gap region between the main wiring section and the bifurcation wiring section; one or a plurality of transistors each divided and formed into a plurality of pieces, the plurality of branch wiring sections individually functioning as a gate electrode and the one or plurality of transistors having a source region formed within the main wiring section and within the bifurcation wiring section and having a drain region formed between the plurality of branch wiring sections; and one or a plurality of pieces of third wiring electrically connected to the drain region of the one or plurality of transistors.

Abstract translation: 一种半导体器件，包括：一个或多个具有主布线部分和分叉布线部分的第一布线; 在主配线部分和分叉线路部分之间的间隙区域内的一条或多条第二布线具有主干布线部分和多个分支布线部分; 一个或多个晶体管分为多个，多个分支布线部分独立地用作栅电极，并且一个或多个晶体管具有形成在主布线部分内和分支布线内的源极区域 并且具有形成在所述多个分支布线部之间的漏极区域; 以及电连接到所述一个或多个晶体管的漏极区域的一个或多个第三布线。

公开(公告)号：US09111808B2

公开(公告)日：2015-08-18

申请号：US14514798

申请日：2014-10-15

Applicant: Japan Display West Inc.

Inventor： Mitsufumi Sogabe ,  Masaki Murase ,  Hiroshi Mizuhashi

IPC: G06F3/045 ,  G06F3/038 ,  H01L27/12 ,  G06F3/041 ,  G06F3/044 ,  G02F1/1333 ,  G02F1/1345

CPC classification number: H01L27/124 ,  G02F1/13338 ,  G02F1/13454 ,  G02F1/136286 ,  G02F1/1368 ,  G06F3/038 ,  G06F3/0412 ,  G06F3/044 ,  G06F3/045 ,  H01L23/528 ,  H01L27/1222 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/78648 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device including: one or more pieces of first wiring having a main wiring section and a bifurcation wiring section; one or a plurality of pieces of second wiring having a trunk wiring section and a plurality of branch wiring sections within a gap region between the main wiring section and the bifurcation wiring section; one or a plurality of transistors each divided and formed into a plurality of pieces, the plurality of branch wiring sections individually functioning as a gate electrode and the one or plurality of transistors having a source region formed within the main wiring section and within the bifurcation wiring section and having a drain region formed between the plurality of branch wiring sections; and one or a plurality of pieces of third wiring electrically connected to the drain region of the one or plurality of transistors.

Abstract translation: 一种半导体器件，包括：一个或多个具有主布线部分和分叉布线部分的第一布线; 在主配线部分和分叉线路部分之间的间隙区域内的一条或多条第二布线具有主干布线部分和多个分支布线部分; 一个或多个晶体管分为多个，多个分支布线部分独立地用作栅电极，并且一个或多个晶体管具有形成在主布线部分内和分支布线内的源极区域 并且具有形成在所述多个分支布线部之间的漏极区域; 以及电连接到所述一个或多个晶体管的漏极区域的一个或多个第三布线。