Method of implementing an engineering change order in an integrated circuit design by windows
    1.
    发明授权
    Method of implementing an engineering change order in an integrated circuit design by windows 有权
    通过Windows实现集成电路设计中的工程变更顺序的方法

    公开(公告)号:US07231626B2

    公开(公告)日:2007-06-12

    申请号:US11015123

    申请日:2004-12-17

    IPC分类号: G06F17/50

    摘要: A method of implementing an engineering change order includes steps of: (a) receiving as input an integrated circuit design; (b) receiving as input an engineering change order to the integrated circuit design; (c) creating at least one window in the integrated circuit design that encloses a change to the integrated circuit design introduced by the engineering change order wherein the window is bounded by coordinates that define an area that is less than an entire area of the integrated circuit design; (d) performing a routing of the integrated circuit design that excludes routing of any net that is not enclosed by the window; (e) replacing an area in a copy of the integrated circuit design that is bounded by the coordinates of the window with results of the incremental routing to generate a revised integrated circuit design; and (f) generating as output the revised integrated circuit design.

    摘要翻译: 一种实现工程变更订单的方法包括以下步骤:(a)作为输入接收集成电路设计; (b)作为输入接收集成电路设计的工程变更订单; (c)在集成电路设计中创建至少一个窗口,其包围由工程改变顺序引入的集成电路设计的变化,其中窗口由限定小于集成电路的整个区域的区域的坐标界定 设计; (d)执行集成电路设计的路由,该路由排除不包括窗口的任何网络的路由; (e)将由窗口坐标限定的集成电路设计的副本中的区域替换为增量路由的结果以生成修订的集成电路设计; 和(f)产生经修订的集成电路设计的输出。

    Slew rate/propagation delay selection circuit
    2.
    发明授权
    Slew rate/propagation delay selection circuit 有权
    转换速率/传播延迟选择电路

    公开(公告)号:US06307414B1

    公开(公告)日:2001-10-23

    申请号:US09523505

    申请日:2000-03-10

    申请人: Jason K. Hoff

    发明人: Jason K. Hoff

    IPC分类号: H03K512

    CPC分类号: H03K19/018585

    摘要: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a first output signal having a predetermined slew rate and propagation delay in response to a first input signal and a control signal. The second circuit may be configured to generate a second output signal having a predetermined slew rate and propagation delay in response to a second input signal and the control signal.

    摘要翻译: 一种包括第一电路和第二电路的装置。 第一电路可以被配置为响应于第一输入信号和控制信号产生具有预定转换速率和传播延迟的第一输出信号。 第二电路可以被配置为响应于第二输入信号和控制信号产生具有预定转换速率和传播延迟的第二输出信号。