Manufacturing method for an integrated semiconductor contact structure having an improved aluminum fill
    1.
    发明申请
    Manufacturing method for an integrated semiconductor contact structure having an improved aluminum fill 审中-公开
    具有改进的铝填充的集成半导体接触结构的制造方法

    公开(公告)号:US20070243708A1

    公开(公告)日:2007-10-18

    申请号:US11402675

    申请日:2006-04-12

    IPC分类号: H01L21/4763 H01L21/44

    摘要: The present invention provides a manufacturing method for an integrated semiconductor contact structure having an improved Aluminum fill comprising the steps of: forming contact holes in an insulation layer provided on a wafer, said contact holes having a respective bottom and respective sidewalls, said bottoms including a respective conductive area; introducing said wafer into a first PVD deposition chamber, said first PVD deposition chamber including a wafer bias means; and cold depositing a first Aluminum layer on the wafer in said first PVD deposition chamber, said first Aluminum layer covering said bottoms and said sidewalls of said contact holes and forming a seed layer; wherein during said step of cold depositing said first Aluminum layer on the wafer in said first PVD deposition chamber said wafer bias means is set to a bias in the range between 20 W and 700 W or −50 V to −800 V.

    摘要翻译: 本发明提供一种具有改进的铝填充物的集成半导体接触结构的制造方法,包括以下步骤:在设置在晶片上的绝缘层中形成接触孔,所述接触孔具有相应的底部和相应的侧壁,所述底部包括 各导电面积; 将所述晶片引入第一PVD沉积室,所述第一PVD沉积室包括晶片偏置装置; 并且在所述第一PVD沉积室中在所述晶片上冷沉积第一铝层,所述第一铝层覆盖所述底部和所述接触孔的所述侧壁并形成种子层; 其中在所述第一PVD沉积室中将所述第一铝层冷沉积在所述晶片上的步骤期间,所述晶片偏置装置被设置为在20W和700W之间或-50V至-800V的范围内的偏压。