Dynamic subchannel allocation
    1.
    发明授权
    Dynamic subchannel allocation 失效
    动态子通道分配

    公开(公告)号:US4437157A

    公开(公告)日:1984-03-13

    申请号:US255585

    申请日:1981-04-20

    IPC分类号: G06F13/12 G06F3/00 G06F3/04

    CPC分类号: G06F13/122

    摘要: An apparatus for and a method of Dynamic Subchannel Allocation permitting easily field modifiable assignment of Input/Output (I/O) subchannels to I/O channels. Many present day medium-to-large scale computers have an I/O unit(s) with a fixed number of I/O ports or I/O channels for the transmission of information between the computer and peripheral devices. Improvements to these I/O channels, now common in the art, permit multiple peripheral devices to be coupled to the computer through a single I/O channel. Each of these multiple peripheral devices may be said to communicate through an I/O subchannel. A given I/O subchannel designation logically specifies the hardware within the shared I/O channel that is dedicated to communication with the corresponding one of the multiple peripheral devices coupled to that shared I/O channel. The present invention is an improvement which provides for allocation of I/O subchannels to I/O channels in the field rather than at time of manufacture. A random access memory (RAM) is employed which provides the correlation between each I/O subchannel and the I/O channel to which it has been allocated. The RAM is called the Channel Descriptor Stack (CDS). The CDS may be loaded using a variety of techniques. In the preferred embodiment, the CDS is loaded via a specialized processor, called a system support processor (SSP), which also performs those tasks normally associated with system control (e.g., system reconfiguration, interface to the system operator, casualty recovery, etc.).

    摘要翻译: 一种用于动态子信道分配的装置和方法,其允许将输入/输出(I / O)子信道容易地现场修改为I / O通道。 许多现在的中型到大型计算机具有I / O单元,其具有固定数量的I / O端口或I / O通道,用于在计算机和外围设备之间传输信息。 这些现有技术中常见的这些I / O通道的改进允许多个外围设备通过单个I / O通道耦合到计算机。 这些多个外围设备中的每一个可以被称为通过I / O子信道进行通信。 给定的I / O子信道指定逻辑地指定专用于与耦合到该共享I / O通道的多个外围设备中的对应的一个通信的共享I / O通道内的硬件。 本发明是一种改进,其提供了在现场的I / O信道中分配I / O子信道,而不是在制造时。 使用随机存取存储器(RAM),其提供每个I / O子信道与其已被分配到的I / O信道之间的相关性。 RAM称为通道描述符堆栈(CDS)。 CDS可以使用各种技术加载。 在优选实施例中,CDS通过专门的处理器(称为系统支持处理器(SSP))来加载,该处理器也执行通常与系统控制相关的那些任务(例如,系统重新配置,与系统操作员的接口,伤员恢复等) )。

    Multiplexed directory for dedicated cache memory system
    2.
    发明授权
    Multiplexed directory for dedicated cache memory system 失效
    专用缓存系统的多路复用目录

    公开(公告)号:US4228503A

    公开(公告)日:1980-10-14

    申请号:US947791

    申请日:1978-10-02

    IPC分类号: G06F12/08 G06F13/00

    CPC分类号: G06F12/0808

    摘要: Apparatus for avoiding ambiguous data in a multi-requestor computing system of the type wherein each of the requestors has its own dedicated cache memory. Each requestor has access to its own dedicated cache memory for purposes of ascertaining whether a particular data word is present in its cache memory and of obtaining that data word directly from its cache memory without the necessity of referencing main memory. Each requestor also has access to all other dedicated cache memories for purposes of invalidating a particular data word contained therein when that same particular data word has been written by that requestor into its own dedicated cache memory. Requestors and addresses in a particular cache memory are time multiplexed in such a way as to allow a particular dedicated cache memory to service invalidate requests from other requestors without sacrificing speed of reference or cycle time of the particular dedicated cache memory from servicing read requests from its own requestor.

    摘要翻译: 用于在多请求者计算系统中避免模糊数据的装置,其中每个请求者具有其自己的专用高速缓存存储器。 为了确定特定数据字是否存在于其高速缓冲存储器中并且直接从其高速缓冲存储器中获取该数据字而不需要引用主存储器,每个请求者都可以访问其专用高速缓冲存储器。 当同一特定数据字被该请求者写入其自己的专用高速缓冲存储器时,每个请求者还可以访问所有其它专用缓存存储器,以使其中包含的特定数据字无效。 特定高速缓冲存储器中的请求者和地址以这样的方式进行时间复用,以便允许特定专用高速缓冲存储器服务来自其他请求者的无效请求,而不会牺牲特定专用高速缓冲存储器的参考速度或周期时间来从其服务的读请求 自己的请求者