-
1.发明申请公开(公告)号：US20210357703A1
公开(公告)日：2021-11-18
申请号：US17318046
申请日：2021-05-12
申请人： Jie Fan , Sunil Rao , Gowtham Muniraju , Cihan Tepedelenlioglu , Andreas Spanias
发明人： Jie Fan , Sunil Rao , Gowtham Muniraju , Cihan Tepedelenlioglu , Andreas Spanias
摘要： Various embodiments of a system and associated method for detecting and classifying faults in a photovoltaic array using graph-based signal processing.
-
2.发明申请Method for fabricating high aspect ratio MEMS device with integrated circuit on the same substrate using post-CMOS process 失效使用后CMOS工艺在同一衬底上制造具有集成电路的高纵横比MEMS器件的方法公开(公告)号：US20050287760A1
公开(公告)日：2005-12-29
申请号：US11111344
申请日：2005-04-22
申请人： Guizhen Yan , Yong Zhu , Jie Fan , Xuesong Liu , Jian Zhou , Yangyuan Wang
发明人： Guizhen Yan , Yong Zhu , Jie Fan , Xuesong Liu , Jian Zhou , Yangyuan Wang
IPC分类号： H01L21/4763 , H01L21/76
CPC分类号： B81C1/00246 , B81C2203/0728 , H01L27/0617
摘要： The invention discloses a novel flexible, modular fabrication method for integrated high aspect ratio single crystal silicon microstructures designed and manufactured in a post conventional CMOS process (Post-CMOS). The method involves the standard circuits formation, the electrical isolation trenched etching and refilling, backside etching, interconnection formation, and structure releasing. Further, a method of tailoring the trench profile for refill the trench fully without void is also disclosed.
摘要翻译： 本发明公开了一种用于在后常规CMOS工艺（后CMOS）中设计和制造的集成高宽比单晶硅微结构的新颖的柔性，模块化制造方法。 该方法包括标准电路形成，电隔离沟槽蚀刻和再填充，背面蚀刻，互连形成和结构释放。 此外，还公开了一种调整沟槽轮廓以在没有空隙的情况下完全填充沟槽的方法。
-
3.发明授权Method for fabricating high aspect ratio MEMS device with integrated circuit on the same substrate using post-CMOS process 失效使用后CMOS工艺在同一衬底上制造具有集成电路的高纵横比MEMS器件的方法公开(公告)号：US07618837B2
公开(公告)日：2009-11-17
申请号：US11111344
申请日：2005-04-22
申请人： Guizhen Yan , Yong Zhu , Jie Fan , Xuesong Liu , Jian Zhou , Yangyuan Wang
发明人： Guizhen Yan , Yong Zhu , Jie Fan , Xuesong Liu , Jian Zhou , Yangyuan Wang
IPC分类号： H01L21/00
CPC分类号： B81C1/00246 , B81C2203/0728 , H01L27/0617
摘要： The invention discloses a novel flexible, modular fabrication method for integrated high aspect ratio single crystal silicon microstructures designed and manufactured in a post conventional CMOS process (Post-CMOS). The method involves the standard circuits formation, the electrical isolation trenched etching and refilling, backside etching, interconnection formation, and structure releasing. Further, a method of tailoring the trench profile for refill the trench fully without void is also disclosed.
摘要翻译： 本发明公开了一种用于在后常规CMOS工艺（后CMOS）中设计和制造的集成高宽比单晶硅微结构的新颖的柔性，模块化制造方法。 该方法包括标准电路形成，电隔离沟槽蚀刻和再填充，背面蚀刻，互连形成和结构释放。 此外，还公开了一种调整沟槽轮廓以在没有空隙的情况下完全填充沟槽的方法。
-
-
搜索结果
3 条记录 (耗时 0.016 秒)
