公开(公告)号：US20090150575A1

公开(公告)日：2009-06-11

申请号：US11951449

申请日：2007-12-06

申请人： Joaquin Madruga ,  Dean J. Burdick

发明人： Joaquin Madruga ,  Dean J. Burdick

IPC分类号： G06F13/28

CPC分类号： G06F13/28

摘要： A method, system and program are provided for dynamically allocating DMA channel identifiers to multiple DMA transfer requests that are grouped in time by virtualizing DMA transfer requests into an available DMA channel identifier using a channel bitmap listing of available DMA channels to select and set an allocated DMA channel identifier. Once the input values associated with the DMA transfer requests are mapped to the selected DMA channel identifier, the DMA transfers are performed using the selected DMA channel identifier, which is then deallocated in the channel bitmap upon completion of the DMA transfers. When there is a request to wait for completion of the data transfers, the same input values are used with the mapping to wait on the appropriate logical channel. With this method, all available logical channels can be utilized with reduced instances of false-sharing.

摘要翻译： 提供了一种方法，系统和程序，用于通过使用可用DMA通道的频道位图列表将DMA传送请求虚拟化为可用的DMA通道标识符来动态地将DMA通道标识符分配给多个DMA传送请求，这些DMA传送请求按时间分组，以选择和设置分配的 DMA通道标识符。 一旦与DMA传输请求相关联的输入值被映射到所选择的DMA通道标识符，则使用所选择的DMA通道标识符来执行DMA传输，然后DMA通道标识符在完成DMA传输后被释放在通道位图中。 当有要求等待数据传输完成时，使用与映射相同的输入值来等待适当的逻辑信道。 利用这种方法，可以利用所有可用的逻辑信道来减少假共享的实例。

公开(公告)号：US08266337B2

公开(公告)日：2012-09-11

申请号：US11951435

申请日：2007-12-06

申请人： Joaquin Madruga ,  Dean J. Burdick

发明人： Joaquin Madruga ,  Dean J. Burdick

IPC分类号： G06F13/28

CPC分类号： G06F13/28

摘要： A method, system and program are provided for dynamically allocating DMA channel identifiers by virtualizing DMA transfer requests into available DMA channel identifiers using a channel bitmap listing of available DMA channels to select and set an allocated DMA channel identifier. Once an input value associated with the DMA transfer request is mapped to the selected DMA channel identifier, the DMA transfer is performed using the selected DMA channel identifier, which is then deallocated in the channel bitmap upon completion of the DMA transfer. When there is a request to wait for completion of the data transfer, the same input value is used with the mapping to wait on the appropriate logical channel. With this method, all available logical channels can be utilized with reduced instances of false-sharing.

摘要翻译： 提供了一种方法，系统和程序，用于通过使用可用DMA通道的频道位图列表将DMA传送请求虚拟化为可用DMA通道标识符来动态分配DMA通道标识符，以选择和设置分配的DMA通道标识符。 一旦与DMA传输请求相关联的输入值被映射到所选择的DMA通道标识符，则使用所选择的DMA通道标识符执行DMA传输，该DMA通道标识符在完成DMA传输时被释放在通道位图中。 当有请求等待数据传输完成时，与映射相同的输入值用于等待适当的逻辑信道。 利用这种方法，可以利用所有可用的逻辑信道来减少假共享的实例。

公开(公告)号：US07865631B2

公开(公告)日：2011-01-04

申请号：US11951449

申请日：2007-12-06

申请人： Joaquin Madruga ,  Dean J. Burdick

发明人： Joaquin Madruga ,  Dean J. Burdick

IPC分类号： G06F13/28

CPC分类号： G06F13/28

摘要： A method, system and program are provided for dynamically allocating DMA channel identifiers to multiple DMA transfer requests that are grouped in time by virtualizing DMA transfer requests into an available DMA channel identifier using a channel bitmap listing of available DMA channels to select and set an allocated DMA channel identifier. Once the input values associated with the DMA transfer requests are mapped to the selected DMA channel identifier, the DMA transfers are performed using the selected DMA channel identifier, which is then deallocated in the channel bitmap upon completion of the DMA transfers. When there is a request to wait for completion of the data transfers, the same input values are used with the mapping to wait on the appropriate logical channel. With this method, all available logical channels can be utilized with reduced instances of false-sharing.

摘要翻译： 提供了一种方法，系统和程序，用于通过使用可用DMA通道的频道位图列表将DMA传送请求虚拟化为可用的DMA通道标识符来动态地将DMA通道标识符分配给多个DMA传送请求，这些DMA传送请求按时间分组，以选择和设置分配的 DMA通道标识符。 一旦与DMA传输请求相关联的输入值被映射到所选择的DMA通道标识符，则使用所选择的DMA通道标识符来执行DMA传输，然后DMA通道标识符在完成DMA传输后被释放在通道位图中。 当有要求等待数据传输完成时，使用与映射相同的输入值来等待适当的逻辑信道。 利用这种方法，可以利用所有可用的逻辑信道来减少假共享的实例。

公开(公告)号：US20090150576A1

公开(公告)日：2009-06-11

申请号：US11951435

申请日：2007-12-06

申请人： Joaquin Madruga ,  Dean J. Burdick

发明人： Joaquin Madruga ,  Dean J. Burdick

IPC分类号： G06F13/28

CPC分类号： G06F13/28

摘要： A method, system and program are provided for dynamically allocating DMA channel identifiers by virtualizing DMA transfer requests into available DMA channel identifiers using a channel bitmap listing of available DMA channels to select and set an allocated DMA channel identifier. Once an input value associated with the DMA transfer request is mapped to the selected DMA channel identifier, the DMA transfer is performed using the selected DMA channel identifier, which is then deallocated in the channel bitmap upon completion of the DMA transfer. When there is a request to wait for completion of the data transfer, the same input value is used with the mapping to wait on the appropriate logical channel. With this method, all available logical channels can be utilized with reduced instances of false-sharing.

摘要翻译： 提供了一种方法，系统和程序，用于通过使用可用DMA通道的频道位图列表将DMA传送请求虚拟化为可用DMA通道标识符来动态分配DMA通道标识符，以选择和设置分配的DMA通道标识符。 一旦与DMA传输请求相关联的输入值被映射到所选择的DMA通道标识符，则使用所选择的DMA通道标识符执行DMA传输，该DMA通道标识符在完成DMA传输时被释放在通道位图中。 当有请求等待数据传输完成时，与映射相同的输入值用于等待适当的逻辑信道。 利用这种方法，可以利用所有可用的逻辑信道来减少假共享的实例。

公开(公告)号：US20110191785A1

公开(公告)日：2011-08-04

申请号：US12699162

申请日：2010-02-03

申请人： Charles J. Archer ,  Gregory H. Bellows ,  Dean J. Burdick ,  James E. Carey ,  Jeffrey M. Ceason ,  Matthew W. Markland ,  Philip J. Sanders ,  Gordon G. Stewart

发明人： Charles J. Archer ,  Gregory H. Bellows ,  Dean J. Burdick ,  James E. Carey ,  Jeffrey M. Ceason ,  Matthew W. Markland ,  Philip J. Sanders ,  Gordon G. Stewart

IPC分类号： G06F9/46

CPC分类号： G06F9/46

摘要： Terminating an accelerator application program in a hybrid computing environment that includes a host computer having a host computer architecture and an accelerator having an accelerator architecture, where the host computer and the accelerator are adapted to one another for data communications by a system level message passing module (‘SLMPM’), and terminating an accelerator application program in a hybrid computing environment includes receiving, by the SLMPM from a host application executing on the host computer, a request to terminate an accelerator application program executing on the accelerator; terminating, by the SLMPM, execution of the accelerator application program; returning, by the SLMPM to the host application, a signal indicating that execution of the accelerator application program was terminated; and performing, by the SLMPM, a cleanup of the execution environment associated with the terminated accelerator application program.

摘要翻译： 在包括具有主机结构的主计算机和具有加速器架构的加速器的混合计算环境中终止加速器应用程序，其中所述主计算机和所述加速器彼此适配以用于由系统级消息传递模块进行数据通信 （“SLMPM”），并且在混合计算环境中终止加速器应用程序包括：通过SLMPM从在主计算机上执行的主机应用程序接收终止在加速器上执行的加速器应用程序的请求; 通过SLMPM终止加速器应用程序的执行; 通过SLMPM向主机应用返回指示加速器应用程序的执行被终止的信号; 并且通过SLMPM执行与终止的加速器应用程序相关联的执行环境的清理。

公开(公告)号：US07870551B2

公开(公告)日：2011-01-11

申请号：US11419047

申请日：2006-05-18

申请人： Vaijayanthimala K. Anand ,  Dean J. Burdick ,  Bret R. Olszewski

发明人： Vaijayanthimala K. Anand ,  Dean J. Burdick ,  Bret R. Olszewski

IPC分类号： G06F9/455

CPC分类号： G06F9/505 ,  G06F9/5033 ,  G06F9/5077

摘要： A mechanism is provided for biasing placement of a software thread on a currently idle and dispatched processor. The operating system starts with the last logical processor on which the software thread ran and determines whether that processor is idle and dispatched and considers each logical processor until a currently dispatched and idle logical processor is found. If a currently dispatched and idle logical processor is not found, then the operating system biases placing the software thread on an idle logical processor.

摘要翻译： 提供了一种用于偏置软件线程在当前空闲和调度的处理器上的布置的机制。 操作系统从软件线程运行的最后一个逻辑处理器开始，并确定该处理器是否空闲和调度，并考虑每个逻辑处理器，直到找到当前调度和空闲的逻辑处理器。 如果没有找到当前调度和空闲的逻辑处理器，则操作系统偏置将软件线程放置在空闲逻辑处理器上。

公开(公告)号：US08108866B2

公开(公告)日：2012-01-31

申请号：US12130090

申请日：2008-05-30

申请人： Vaijayanthimala K. Anand ,  Dean J. Burdick ,  Bret R. Olszewski

发明人： Vaijayanthimala K. Anand ,  Dean J. Burdick ,  Bret R. Olszewski

IPC分类号： G06F9/46 ,  G06F12/08 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F9/5033 ,  G06F9/5077 ,  G06F2209/508

摘要： A mechanism is provided for determining whether to use cache affinity as a criterion for software thread dispatching in a shared processor logical partitioning data processing system. The server firmware may store data about when and/or how often logical processors are dispatched. Given these data, the operating system may collect metrics. Using the logical processor metrics, the operating system may determine whether cache affinity is likely to provide a significant performance benefit relative to the cost of dispatching a particular logical processor to the operating system.

摘要翻译： 提供了一种用于确定是否使用高速缓存亲和力作为在共享处理器逻辑分区数据处理系统中的软件线程调度的标准的机制。 服务器固件可以存储关于何时和/或多少逻辑处理器被调度的数据。 鉴于这些数据，操作系统可能会收集指标。 使用逻辑处理器度量，操作系统可以确定高速缓存关联性是否可能相对于将特定逻辑处理器调度到操作系统的成本提供显着的性能优点。

公开(公告)号：US07865895B2

公开(公告)日：2011-01-04

申请号：US11419019

申请日：2006-05-18

申请人： Vaijayanthimala K. Anand ,  Dean J. Burdick ,  Bret R. Olszewski

发明人： Vaijayanthimala K. Anand ,  Dean J. Burdick ,  Bret R. Olszewski

IPC分类号： G06F9/46 ,  G06F12/00

CPC分类号： G06F9/5033 ,  G06F9/5077 ,  G06F2209/508

摘要： A mechanism is provided for determining whether to use cache affinity as a criterion for software thread dispatching in a shared processor logical partitioning data processing system. The server firmware may store data about when and/or how often logical processors are dispatched. Given these data, the operating system may collect metrics. Using the logical processor metrics, the operating system may determine whether cache affinity is likely to provide a significant performance benefit relative to the cost of dispatching a particular logical processor to the operating system.

摘要翻译： 提供了一种用于确定是否使用高速缓存亲和力作为在共享处理器逻辑分区数据处理系统中的软件线程调度的标准的机制。 服务器固件可以存储关于何时和/或多少逻辑处理器被调度的数据。 鉴于这些数据，操作系统可能会收集指标。 使用逻辑处理器度量，操作系统可以确定高速缓存关联性是否可能相对于将特定逻辑处理器调度到操作系统的成本提供显着的性能优点。

公开(公告)号：US09417905B2

公开(公告)日：2016-08-16

申请号：US12699162

申请日：2010-02-03

申请人： Charles J. Archer ,  Gregory H. Bellows ,  Dean J. Burdick ,  James E. Carey ,  Jeffrey M. Ceason ,  Matthew W. Markland ,  Philip J. Sanders ,  Gordon G. Stewart

发明人： Charles J. Archer ,  Gregory H. Bellows ,  Dean J. Burdick ,  James E. Carey ,  Jeffrey M. Ceason ,  Matthew W. Markland ,  Philip J. Sanders ,  Gordon G. Stewart

IPC分类号： G06F3/00 ,  G06F9/44 ,  G06F9/46 ,  G06F13/00

CPC分类号： G06F9/46

摘要： Terminating an accelerator application program in a hybrid computing environment that includes a host computer having a host computer architecture and an accelerator having an accelerator architecture, where the host computer and the accelerator are adapted to one another for data communications by a system level message passing module (‘SLMPM’), and terminating an accelerator application program in a hybrid computing environment includes receiving, by the SLMPM from a host application executing on the host computer, a request to terminate an accelerator application program executing on the accelerator; terminating, by the SLMPM, execution of the accelerator application program; returning, by the SLMPM to the host application, a signal indicating that execution of the accelerator application program was terminated; and performing, by the SLMPM, a cleanup of the execution environment associated with the terminated accelerator application program.

摘要翻译： 在包括具有主机结构的主计算机和具有加速器架构的加速器的混合计算环境中终止加速器应用程序，其中所述主计算机和所述加速器彼此适配以用于由系统级消息传递模块进行数据通信 （“SLMPM”），并且在混合计算环境中终止加速器应用程序包括：通过SLMPM从在主计算机上执行的主机应用程序接收终止在加速器上执行的加速器应用程序的请求; 通过SLMPM终止加速器应用程序的执行; 通过SLMPM向主机应用返回指示加速器应用程序的执行被终止的信号; 并且通过SLMPM执行与终止的加速器应用程序相关联的执行环境的清理。

公开(公告)号：US20090327613A1

公开(公告)日：2009-12-31

申请号：US12145551

申请日：2008-06-25

申请人： Mark R. Nutter ,  Dean J. Burdick ,  Barry L. Minor

发明人： Mark R. Nutter ,  Dean J. Burdick ,  Barry L. Minor

IPC分类号： G06F12/08

CPC分类号： G06F12/0875

摘要： A method for implementing a software-managed cache comprises determining an object identifier (ID) for each of a first set of objects of a plurality of objects resident in a local memory, to generate a first cache table, the first cache table comprising a plurality of entries. Each object comprises an object ID and an effective address. The method receives a request for an object, the request comprising an object ID. The method compares the received object ID with the entries in the first cache table. In the event the received object ID matches an entry in the first cache table, the method returns the matching entry in response to the request. In the event the received object ID does not match an entry in the first cache table, the method calculates an effective address in the local memory of the object associated with the object ID.

摘要翻译： 用于实现软件管理的高速缓存的方法包括为驻留在本地存储器中的多个对象的第一组对象中的每一个确定对象标识符（ID），以生成第一高速缓存表，所述第一高速缓存表包括多个 的条目。 每个对象包括对象ID和有效地址。 该方法接收对象的请求，该请求包括对象ID。 该方法将接收的对象ID与第一高速缓存表中的条目进行比较。 在接收到的对象ID与第一高速缓存表中的条目匹配的情况下，该方法响应于该请求返回匹配的条目。 在接收到的对象ID与第一高速缓存表中的条目不匹配的情况下，该方法计算与对象ID相关联的对象的本地存储器中的有效地址。