公开(公告)号：US20050170570A1

公开(公告)日：2005-08-04

申请号：US10768341

申请日：2004-01-30

申请人： Joel DeSouza ,  Keith Fogel ,  Harold Hovel ,  Junedong Lee ,  Siegfried Maurer ,  Devendra Sadana ,  Dominic Schepis

发明人： Joel DeSouza ,  Keith Fogel ,  Harold Hovel ,  Junedong Lee ,  Siegfried Maurer ,  Devendra Sadana ,  Dominic Schepis

IPC分类号： H01L21/00 ,  H01L21/762 ,  H01L21/84

CPC分类号： H01L21/76243 ,  H01L21/84

摘要： A SIMOX (separation by implanted oxygen) process is provided that forms a silicon-on-insulator (SOI) substrate having a buried oxide with improved electrical properties. The process implements at least one of the following processing steps into SIMOX: (I) lowering of the oxygen ion dose in the base oxygen ion implant step; (II) off-setting the implant energy of the room temperature (RT) implant step to a value that is about 5 to about 20% lower than the base ion implant step; and (III) creating a soak cycle, i.e., pre-annealing step, prior to the internal oxidation anneal which allows dissolution of Si and SiOx precipitates in the oxygen implanted region. The temperature and time of the soak cycle as well as the base implant dose are critical in determining the final BOX quality.

摘要翻译： 提供SIMOX（通过注入氧的分离）工艺，其形成具有改善的电性能的具有掩埋氧化物的绝缘体上硅（SOI）衬底。 该方法将至少一个以下处理步骤实施到SIMOX中：（I）降低基氧离子注入步骤中的氧离子剂量; （II）将室温（RT）注入步骤的植入能量设置为比基础离子注入步骤低约5至约20％的值; 和（III）在内部氧化退火之前产生浸泡循环，即预退火步骤，其允许在氧注入区域中溶解Si和SiO x X沉淀。 浸泡循环的温度和时间以及基础植入剂量对于确定最终BOX质量至关重要。

公开(公告)号：US20070218597A1

公开(公告)日：2007-09-20

申请号：US11384718

申请日：2006-03-15

申请人： Stephen Bedell ,  Joel DeSouza ,  Devendra Sadana ,  Klaus Schwarz ,  Alexander Reznicek

发明人： Stephen Bedell ,  Joel DeSouza ,  Devendra Sadana ,  Klaus Schwarz ,  Alexander Reznicek

IPC分类号： H01L21/8232 ,  H01L21/335

CPC分类号： H01L29/1054 ,  H01L21/823807 ,  H01L29/78 ,  H01L29/7843

摘要： A structure and method for controlling the behavior of dislocations in strained semiconductor layers is described incorporating a graded alloy region to provide a strain gradient to change the slope or curvature of a dislocation propagating upwards or gliding in the semiconductor layer in the proximity of the source and drain of a MOSFET. The upper surface of the strained semiconductor layer may be roughened and/or contain a dielectric layer or silicide which may be patterned to trap the upper end of dislocations in selected surface areas. The invention solves the problem of dislocation segments passing through both the source and drain of a MOSFET creating leakage currents or shorts therebetween.

摘要翻译： 描述了用于控制应变半导体层中的位错行为的结构和方法，其包括渐变合金区域以提供应变梯度以改变在源附近向上传播或在滑动区域中传播的位错的斜率或曲率， MOSFET的漏极。 应变半导体层的上表面可以被粗糙化和/或包含可以被图案化的介电层或硅化物，以捕获选定表面区域中位错的上端。 本发明解决了通过MOSFET的源极和漏极的位错段产生在其间产生漏电流或短路的问题。