Computing system having multiple nodes coupled in series in a closed loop
    1.
    发明授权
    Computing system having multiple nodes coupled in series in a closed loop 有权
    具有多个节点的计算系统在闭环中串联耦合

    公开(公告)号:US6134647A

    公开(公告)日:2000-10-17

    申请号:US290879

    申请日:1999-04-14

    摘要: A data processing system includes a plurality of nodes, a serial data bus interconnecting the nodes in series in a closed loop for passing address and data information, and at least one processing node. In one construction, this processing node has a processor, a printed circuit board, a memory partitioned into first and second sections and a local bus connecting the processor, a block sharable memory section of the memory, and the printed circuit board. The local bus is used for transferring data in parallel from the processor to a directly sharable memory section of the memory on the printed circuit board and for transferring data from the block sharable memory to the printed circuit board. The printed circuit board includes a sensor for sensing when data is transferred into the directly sharable memory, a queuing device for queuing the sensed data, a serializer for serializing the queued data, a transmitter for transmitting the serialized data onto the serial data bus to the next successive processing node, a receiver for receiving serialized data from next preceding processing node, and a deserializer for deserializing the received serialized data into parallel data.

    摘要翻译: 数据处理系统包括多个节点,串行数据总线将节点串联连接在用于传递地址和数据信息的闭环中,以及至少一个处理节点。 在一个结构中,该处理节点具有处理器,印刷电路板,划分成第一和第二部分的存储器以及连接处理器,存储器的块可共享存储器部分和印刷电路板的本地总线。 本地总线用于从处理器并行传输数据到印刷电路板上存储器的直接共享存储器部分,并将数据从块可共享存储器传送到印刷电路板。 印刷电路板包括用于感测数据被传送到直接共享的存储器中的传感器,用于对感测数据进行排队的排队装置,串行化排队数据的串行器,用于将串行数据发送到串行数据总线上的发送器, 下一个连续处理节点,用于从下一个前一个处理节点接收串行化数据的接收器,以及用于反序列化所接收的串行化数据到并行数据的解串器。

    Data processing system including a shared memory resource circuit
    2.
    发明授权
    Data processing system including a shared memory resource circuit 有权
    数据处理系统包括共享存储器资源电路

    公开(公告)号:US06442670B2

    公开(公告)日:2002-08-27

    申请号:US09899371

    申请日:2001-07-02

    IPC分类号: G06F1500

    CPC分类号: G06F15/7864 G06F15/17381

    摘要: A data processing system comprises a plurality of nodes and a serial data bus interconnecting the nodes in series in a closed loop, for passing address and data information. At least one processing node includes a processor, a printed circuit board and a memory which is partitioned into a plurality of sections, including a first section for directly sharable memory located on the printed circuit board, and a second section for block sharable memory. A local bus connects the processor, block sharable memory and printed circuit board, for transferring data in parallel from the processor to the directly sharable memory on the printed circuit board, and for transferring data from the block sharable memory to the printed circuit board. The printed circuit board includes a sensor for sensing when data is transferred into the directly sharable memory, a queuing device for queuing the sense data, a serializer for serializing queued data, a transmitter for transmitting serialized data onto the serial bus to a next successive processing node, a receiver for receiving serialized data from a preceding processing node, and a deserializer for transforming received serialized data into a parallel format.

    摘要翻译: 数据处理系统包括多个节点和串行数据总线,这些节点将节点串联在闭环中,用于传递地址和数据信息。 至少一个处理节点包括处理器,印刷电路板和被划分成多个部分的存储器,该存储器包括位于印刷电路板上的用于直接共享存储器的第一部分和用于阻止可共享存储器的第二部分。 本地总线连接处理器,阻止共享存储器和印刷电路板,用于将数据从处理器并行传输到印刷电路板上的直接共享存储器,并将数据从块可共享存储器传送到印刷电路板。 印刷电路板包括用于感测何时将数据传送到直接共享的存储器中的传感器,用于排列感测数据的排队装置,用于串行排队的数据的串行器,用于将串行化数据发送到串行总线上的下一个连续处理 节点,用于从前一处理节点接收串行化数据的接收器,以及用于将接收到的串行化数据变换成并行格式的解串器。

    Data processing system including a shared memory resource circuit
    3.
    发明授权
    Data processing system including a shared memory resource circuit 有权
    数据处理系统包括共享存储器资源电路

    公开(公告)号:US06256722B1

    公开(公告)日:2001-07-03

    申请号:US09459432

    申请日:1999-12-13

    IPC分类号: G06F1500

    摘要: A data processing system comprises a plurality of nodes and a serial data bus interconnecting the nodes in series in a closed loop, for passing address and data information. At least one processing node includes a processor, a printed circuit board and a memory which is partitioned into a plurality of sections, including a first section for directly sharable memory located on the printed circuit board, and a second section for block sharable memory. A local bus connects the processor, block sharable memory and printed circuit board, for transferring data in parallel from the processor to the directly sharable memory on the printed circuit board, and for transferring data from the block sharable memory to the printed circuit board. The printed circuit board includes a sensor for sensing when data is transferred into the directly sharable memory, a queuing device for queuing the sense data, a serializer for serializing queued data, a transmitter for transmitting serialized data onto the serial bus to a next successive processing node, a receiver for receiving serialized data from a preceding processing node, and a deserializer for transforming received serialized data into a parallel format.

    摘要翻译: 数据处理系统包括多个节点和串行数据总线,这些节点将节点串联在闭环中,用于传递地址和数据信息。 至少一个处理节点包括处理器,印刷电路板和被划分成多个部分的存储器,该存储器包括位于印刷电路板上的用于直接共享存储器的第一部分和用于阻止可共享存储器的第二部分。 本地总线连接处理器,阻止共享存储器和印刷电路板,用于将数据从处理器并行传输到印刷电路板上的直接共享存储器,并将数据从块可共享存储器传送到印刷电路板。 印刷电路板包括用于感测何时将数据传送到直接共享的存储器中的传感器,用于排列感测数据的排队装置,用于串行排队的数据的串行器,用于将串行化数据发送到串行总线上的下一个连续处理 节点,用于从前一处理节点接收串行化数据的接收器,以及用于将接收到的串行化数据变换成并行格式的解串器。

    Multiprocessor distributed memory system and board and methods therefor
    4.
    发明授权
    Multiprocessor distributed memory system and board and methods therefor 失效
    多处理器分布式存储系统及其板及其方法

    公开(公告)号:US06094532A

    公开(公告)日:2000-07-25

    申请号:US826805

    申请日:1997-03-25

    摘要: A data processing system comprises a plurality of nodes and a serial data bus interconnecting the nodes in series in a closed loop, for passing address and data information. At least one processing node includes a processor, a printed circuit board and a memory which is partitioned into a plurality of sections, including a first section for directly sharable memory located on the printed circuit board, and a second section for block sharable memory. A local bus connects the processor, block sharable memory and printed circuit board, for transferring data in parallel from the processor to the directly sharable memory on the printed circuit board, and for transferring data from the block sharable memory to the printed circuit board. The printed circuit board includes a sensor for sensing when data is transferred into the directly sharable memory, a queuing device for queuing the sense data, a serializer for serializing queued data, a transmitter for transmitting serialized data onto the serial bus to a next successive processing node, a receiver for receiving serialized data from a preceding processing node, and a deserializer for transforming received serialized data into a parallel format.

    摘要翻译: 数据处理系统包括多个节点和串行数据总线,这些节点将节点串联在闭环中,用于传递地址和数据信息。 至少一个处理节点包括处理器,印刷电路板和被划分成多个部分的存储器,该存储器包括位于印刷电路板上的用于直接共享存储器的第一部分和用于阻止可共享存储器的第二部分。 本地总线连接处理器,阻止共享存储器和印刷电路板,用于将数据从处理器并行传输到印刷电路板上的直接共享存储器,并将数据从块可共享存储器传送到印刷电路板。 印刷电路板包括用于感测何时将数据传送到直接共享的存储器中的传感器,用于排列感测数据的排队装置,用于串行排队的数据的串行器,用于将串行化数据发送到串行总线上的下一个连续处理 节点,用于从前一处理节点接收串行化数据的接收器,以及用于将接收到的串行化数据变换成并行格式的解串器。