公开(公告)号：US10216876B2

公开(公告)日：2019-02-26

申请号：US14828686

申请日：2015-08-18

申请人： Jongwook Jeon ,  Yeoil Yun ,  Sangwoo Pae ,  Uihui Kwon ,  Keunho Lee

发明人： Jongwook Jeon ,  Yeoil Yun ,  Sangwoo Pae ,  Uihui Kwon ,  Keunho Lee

IPC分类号： G06F17/50

摘要： A method of designing a semiconductor circuit using a circuit simulation tool executed by a computer includes calculating power consumptions of elements of the semiconductor circuit by use of the circuit simulation tool. A thermal netlist is created about the semiconductor circuit, based on the power consumptions and geometry information of each of the elements. A simulation of the semiconductor circuit is performed with the thermal netlist using the circuit simulation tool to detect a temperature of each of the elements. The thermal netlist includes thermal capacitance information of each of the elements.

公开(公告)号：US08856719B2

公开(公告)日：2014-10-07

申请号：US13616511

申请日：2012-09-14

申请人： Seonguk Min ,  Sangho Park ,  Yeoil Yun

发明人： Seonguk Min ,  Sangho Park ,  Yeoil Yun

IPC分类号： G06F11/22 ,  G06F17/50

CPC分类号： G06F17/5036

摘要： A circuit simulation method for checking a circuit error is disclosed. The method may include generating a netlist with respect to a designed circuit, simulating an operation of the designed circuit using the generated netlist, and checking an error of the designed circuit using the generated netlist and using a waveform generated when performing the simulation.

摘要翻译： 公开了一种用于检查电路错误的电路仿真方法。 该方法可以包括相对于设计的电路生成网表，使用所生成的网表模拟所设计的电路的操作，以及使用所生成的网表来检查所设计的电路的错误，并使用在执行仿真时产生的波形。