TESTABLE ELECTRONIC DEVICE FOR WIRELESS COMMUNICATION
    1.
    发明申请
    TESTABLE ELECTRONIC DEVICE FOR WIRELESS COMMUNICATION 审中-公开
    用于无线通信的可测试的电子设备

    公开(公告)号:US20100049465A1

    公开(公告)日:2010-02-25

    申请号:US12526852

    申请日:2008-02-21

    IPC分类号: G01M19/00 G01R31/00

    摘要: An electronic device is disclosed comprising a transceiver stage (140) for communicating signals between the electronic device and a further device; and a baseband processor arrangement (120) implementing a built-in self test arrangement for testing the transceiver channels of the electronic device (100). The built-in self test arrangement further comprises a plurality of records, each record comprising predetermined response deviations to different test signals caused by a parametric fault; and means for selecting those records from the plurality of records for which the predetermined response deviation corresponds to the deviation of the received response. The present invention is based on the realization that a deviation of a response to a test signal from an expected value is dependent on specific parametric faults in specific components in the test signal path and, in addition, on the shape of the test signal. This information is stored in the BIST arrangement and is used to identify a parametric fault, if present, by subjecting the electronic device to a series of test signals.

    摘要翻译: 公开了一种电子设备,包括用于在电子设备和另一设备之间传送信号的收发机级(140); 以及实现用于测试电子设备(100)的收发信道的内置自测试装置的基带处理器装置(120)。 内置自检装置还包括多个记录,每个记录包括由参数故障引起的对不同测试信号的预定响应偏差; 以及用于从预定响应偏差对应于接收到的响应的偏差的多个记录中选择那些记录的装置。 本发明基于这样一种认知,即对来自预期值的测试信号的响应的偏差取决于测试信号路径中的特定组件中的特定参数故障,并且还取决于测试信号的形状。 该信息存储在BIST装置中,并且用于通过使电子设备经受一系列测试信号来识别参数故障(如果存在)。

    ANALOG CIRCUIT TESTING AND TEST PATTERN GENERATION
    2.
    发明申请
    ANALOG CIRCUIT TESTING AND TEST PATTERN GENERATION 有权
    模拟电路测试和测试模式生成

    公开(公告)号:US20100109676A1

    公开(公告)日:2010-05-06

    申请号:US12594967

    申请日:2008-04-03

    IPC分类号: G01R31/02

    CPC分类号: G01R31/31813 G01R31/316

    摘要: Test vectors for structural testing of an analog circuit are selected by first selecting an initial set of test input vectors for the analog circuit. A set of faults is selected, comprising faults that each correspond to a respective node in the analog circuit and corresponding fault voltage value for that node. A measure of overlap is computed between probability distributions of test output signal values for the analog circuit in response to the test input vectors in the presence and absence of each of the faults from said set of faults respectively, as a function of estimated statistical spread of component and/or process parameter values in the analog circuit. Test input vectors are selected from the initial set of test input vectors for use in testing on the basis of whether the measure of overlap for at least one if the faults is below a threshold value in response to the selected test input vector under control of the test selection computer.

    摘要翻译: 通过首先选择模拟电路的初始测试输入向量集来选择模拟电路结构测试的测试向量。 选择一组故障,其中包括每个对应于模拟电路中的相应节点的故障以及该节点的对应的故障电压值。 在模拟电路的测试输出信号值的概率分布中,根据来自所述故障组的每个故障的存在和不存在的测试输入向量,分别计算重叠的度量,作为估计的统计扩展的函数 模拟电路中的组件和/或过程参数值。 从用于测试的初始测试输入向量组中选择测试输入向量,该测试输入向量基于如果故障低于阈值的至少一个的重叠测量是响应于所选择的测试输入向量在 测试选择电脑。

    Analog circuit testing and test pattern generation
    3.
    发明授权
    Analog circuit testing and test pattern generation 有权
    模拟电路测试和测试模式生成

    公开(公告)号:US08122423B2

    公开(公告)日:2012-02-21

    申请号:US12594967

    申请日:2008-04-03

    IPC分类号: G06F17/50

    CPC分类号: G01R31/31813 G01R31/316

    摘要: Test vectors for structural testing of an analog circuit are selected by first selecting an initial set of test input vectors for the analog circuit. A set of faults is selected, comprising faults that each correspond to a respective node in the analog circuit and corresponding fault voltage value for that node. A measure of overlap is computed between probability distributions of test output signal values for the analog circuit in response to the test input vectors in the presence and absence of each of the faults from said set of faults respectively, as a function of estimated statistical spread of component and/or process parameter values in the analog circuit. Test input vectors are selected from the initial set of test input vectors for use in testing on the basis of whether the measure of overlap for at least one if the faults is below a threshold value in response to the selected test input vector under control of the test selection computer.

    摘要翻译: 通过首先选择模拟电路的初始测试输入向量集来选择模拟电路结构测试的测试向量。 选择一组故障,其中包括每个对应于模拟电路中的相应节点的故障以及该节点的对应的故障电压值。 在模拟电路的测试输出信号值的概率分布中,根据来自所述故障组的每个故障的存在和不存在的测试输入向量,分别计算重叠的度量,作为估计的统计扩展的函数 模拟电路中的组件和/或过程参数值。 从用于测试的初始测试输入向量组中选择测试输入向量,该测试输入向量基于如果故障低于阈值的至少一个的重叠测量是响应于所选择的测试输入向量在 测试选择电脑。