公开(公告)号：US20100225859A1

公开(公告)日：2010-09-09

申请号：US12771633

申请日：2010-04-30

申请人： Jui Hsin TSAI ,  Chia Hua YU ,  Kun Chen LEE

发明人： Jui Hsin TSAI ,  Chia Hua YU ,  Kun Chen LEE

IPC分类号： G02F1/1335 ,  H01L33/08

CPC分类号： G02F1/136286 ,  G02F1/136213 ,  G02F2001/134345

摘要： A TFT array substrate includes gate lines, data lines, and first and second common lines. The gate lines are disposed on a transparent substrate. The first gate lines to the N+1-th gate lines are arranged in order, and N is a positive number. The data lines cross the gate lines. There is no pixel region defined by the N-th and N+1-th gate lines and adjacent two of the data lines, when N is an even number. There are two pixel regions being left and right pixel region defined by the N-th and N+1-th gate lines and adjacent two of the data lines, when N is an odd number. The first common lines are parallel to the gate lines. The second common lines are parallel to the data lines and electrically connected to the first common lines, wherein each second common line is disposed between the left and right pixel regions.

摘要翻译： TFT阵列基板包括栅极线，数据线以及第一和第二公共线。 栅极线设置在透明基板上。 到第N + 1栅极线的第一栅极线依次排列，N是正数。 数据线穿过栅极线。 当N是偶数时，不存在由第N和第N + 1个栅极线和相邻的两条数据线限定的像素区域。 当N是奇数时，存在由第N和第N + 1个栅极线和相邻的两条数据线限定的左右像素区域的两个像素区域。 第一条公共线与栅极线平行。 第二公共线与数据线平行并且电连接到第一公共线，其中每个第二公共线设置在左和右像素区之间。