公开(公告)号：US20090068809A1

公开(公告)日：2009-03-12

申请号：US12267785

申请日：2008-11-10

申请人： Jung-woo SEO ,  Jong-seo HONG ,  Tae-hyuk AHN ,  Jeong-sic JEON ,  Jun-sik HONG ,  Young-sun CHO

发明人： Jung-woo SEO ,  Jong-seo HONG ,  Tae-hyuk AHN ,  Jeong-sic JEON ,  Jun-sik HONG ,  Young-sun CHO

IPC分类号： H01L21/768 ,  H01L21/336

CPC分类号： H01L21/76895 ,  H01L21/76837 ,  H01L21/76885 ,  H01L21/76897 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/10894

摘要： A semiconductor memory device includes a semiconductor substrate in which a cell region and a core and peripheral region are defined. The device further comprises isolation layers formed in the semiconductor substrate to define active regions, a first gate electrode structure formed in the cell region and a second gate electrode structure formed in the core and peripheral region. Source and drain regions formed in the active regions on respective sides of each of the gate electrode structures and self-aligned contact pads are formed in the cell region in contact with the source and drain regions. An insulating interlayer is formed on the semiconductor substrate between the self-aligned contact pads, and etch stoppers are formed on the insulating interlayer between the self-aligned contact pads in the cell region.

摘要翻译： 半导体存储器件包括其中限定了单元区域和芯和外围区域的半导体衬底。 该器件还包括形成在半导体衬底中以限定有源区的隔离层，形成在单元区域中的第一栅电极结构和形成在芯和外围区中的第二栅电极结构。 形成在每个栅电极结构和自对准接触焊盘的相应侧上的有源区中的源区和漏区形成在与源区和漏区接触的单元区域中。 在自对准接触焊盘之间的半导体衬底上形成绝缘中间层，并且在电池区域中的自对准接触焊盘之间的绝缘中间层上形成蚀刻阻挡层。