-
公开(公告)号:US10712289B2
公开(公告)日:2020-07-14
申请号:US14809774
申请日:2015-07-27
IPC分类号: G01N21/95 , G01B11/14 , G03F7/20 , G01N21/956
摘要: Various embodiments for detecting defects on a wafer are provided. One method includes acquiring output generated by an inspection system for a wafer during an inspection process that is performed after at least first and second process steps have been performed on the wafer. The first and second process steps include forming first and second portions, respectively, of a design on the wafer. The first and second portions of the design are mutually exclusive in space on the wafer. The method also includes detecting defects on the wafer based on the output and determining positions of the defects with respect to the first and second portions of the design. In addition, the method includes associating different portions of the defects with the first or second process step based on the positions of the defects with respect to the first and second portions of the design.
-
2.
公开(公告)号:US20160033420A1
公开(公告)日:2016-02-04
申请号:US14809774
申请日:2015-07-27
摘要: Various embodiments for detecting defects on a wafer are provided. One method includes acquiring output generated by an inspection system for a wafer during an inspection process that is performed after at least first and second process steps have been performed on the wafer. The first and second process steps include forming first and second portions, respectively, of a design on the wafer. The first and second portions of the design are mutually exclusive in space on the wafer. The method also includes detecting defects on the wafer based on the output and determining positions of the defects with respect to the first and second portions of the design. In addition, the method includes associating different portions of the defects with the first or second process step based on the positions of the defects with respect to the first and second portions of the design.
摘要翻译: 提供了用于检测晶片上的缺陷的各种实施例。 一种方法包括在至少在晶片上执行第一和第二处理步骤之后执行的检查过程中获取由晶片的检查系统产生的输出。 第一和第二工艺步骤包括分别在晶片上形成设计的第一和第二部分。 设计的第一和第二部分在晶片上的空间中是相互排斥的。 该方法还包括基于输出和相对于设计的第一和第二部分确定缺陷的位置来检测晶片上的缺陷。 此外,该方法包括基于缺陷相对于设计的第一和第二部分的位置,将缺陷的不同部分与第一或第二处理步骤相关联。
-