Semiconductor memory device with structure providing increased operating speed
    1.
    发明授权
    Semiconductor memory device with structure providing increased operating speed 失效
    具有结构提供更高操作速度的半导体存储器件

    公开(公告)号:US06879527B2

    公开(公告)日:2005-04-12

    申请号:US10614013

    申请日:2003-07-08

    IPC分类号: G11C8/18 G11C7/10 G11C7/00

    CPC分类号: G11C7/1012 G11C7/1051

    摘要: A semiconductor memory device includes a plurality of memory array blocks including predetermined numbers of memory cells, the memory array blocks being arranged in the row direction; a RAS chain being aligned at a side of the plurality of memory array blocks in the row direction, the RAS chain for selecting and activating a particular word line; a CAS chain being aligned at the other side of the plurality of memory array blocks in the column direction, the CAS chain for amplifying N bits of data from the plurality of memory array blocks and outputting the result to an input/output (IO) line, wherein N is a natural number more than 2; and a data converter for continuously outputting the N bits of data input via the IO line from a memory array block nearest to the RAS chain to a memory array block farthest from the RAS chain.

    摘要翻译: 半导体存储器件包括多个存储器阵列块,其包括预定数量的存储器单元,存储器阵列块被布置在行方向上; RAS链在行方向上的多个存储器阵列块的一侧对齐,RAS链用于选择和激活特定字线; CAS链在列方向上在多个存储器阵列块的另一侧对准,CAS链用于从多个存储器阵列块放大N位数据,并将结果输出到输入/输出(IO)线 其中N是大于2的自然数; 以及数据转换器,用于将最靠近RAS链的存储器阵列块经由IO线输入的N位数据连续地输出到距离RAS链最远的存储器阵列块。