公开(公告)号：US07130783B1

公开(公告)日：2006-10-31

申请号：US09760063

申请日：2001-01-12

申请人： Kevin M. Harer ,  Pei-Hsin Ho ,  Robert F Damiano

发明人： Kevin M. Harer ,  Pei-Hsin Ho ,  Robert F Damiano

IPC分类号： G06F9/44 ,  G06F17/50 ,  G06F11/22

CPC分类号： G06F17/504 ,  G06F11/261 ,  G06F17/5022

摘要： System, methods, and apparatus for verifying microcircuit designs by interleaving between random and formal simulation techniques to identify input traces useful for driving designs under test into sequences of device states. In a method aspect the invention provides process for beginning random simulation of a sequence of states of a microcircuit design by inputting a sequence of random input vectors to a design under test model in order to obtain a sequence of random simulation states; monitoring a simulation coverage progress metric to determine a preference for switching from random simulation to formal methods of simulating states in the design under test; beginning formal simulation of states in the design under test and monitoring a formal coverage progress metric to determine a preference for resuming random simulation of states of said microcircuit design; and resuming random simulation. Preferably the process of interleaving simulation methods continues until an input vector suitable for driving the design under test model into each of a set of previously-identified goal states has been obtained.

摘要翻译： 用于通过随机和正式模拟技术之间的交错验证微电路设计的系统，方法和装置，以识别用于将被测试的设计驱动到设备状态序列的输入跟踪。 在方法方面，本发明提供了通过将随机输入向量的序列输入到测试模型下的设计来开始对微电路设计的状态序列的随机模拟的过程，以便获得随机模拟状态的序列; 监测模拟覆盖进度指标，以确定从随机模拟切换到模拟待测设计状态的正式方法的偏好; 开始对被测设计中状态的正式模拟，并监视正式的覆盖进度度量，以确定恢复所述微电路设计状态的随机模拟的偏好; 并恢复随机模拟。 优选地，交织模拟方法的过程继续进行，直到已经获得了适合于将测试模型下的设计驱动到一组先前识别的目标状态中的每一个的输入向量。