公开(公告)号：US20240393971A1

公开(公告)日：2024-11-28

申请号：US18797068

申请日：2024-08-07

Applicant: Kioxia Corporation

Inventor： Tomoyuki KANTANI ,  Kousuke FUJITA ,  Iku ENDO

IPC: G06F3/06

Abstract: A memory system includes a non-volatile memory and a memory controller. The memory controller is configured to perform a write operation on the non-volatile memory in response to a write command from a host by writing system data in a first mode to a first block of the non-volatile memory, the first mode being a write mode for writing data with a first number of bits per memory cell, writing user data in the first mode to a second block of the non-volatile memory when the write command is of a first type, and writing user data in a second mode to a third block of the non-volatile memory when the write command is of a second type. The second mode is a write mode for writing data with a second number of bits larger than the first number of bits per memory cell.

公开(公告)号：US20240094932A1

公开(公告)日：2024-03-21

申请号：US18176452

申请日：2023-02-28

Applicant: Kioxia Corporation

Inventor： Tomoyuki KANTANI ,  Kousuke FUJITA ,  Iku ENDO

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0607 ,  G06F3/0659 ,  G06F3/0679

Abstract: A memory system includes a memory controller configured to write data in a first mode to a first block of a first area of a non-volatile memory. The first mode is a write mode for writing data with a first number of bits per memory cell. The memory controller is further configured to execute copy processing on the data written in the first mode to the first block, by writing system data written in the first block to a second block of the first area in the first mode and writing user data written in the first block to a third block of a second area of the non-volatile memory in the second mode. The second mode is a write mode for writing data with a second number of bits larger than the first number of bits per memory cell.