Dynamic buffer caching of storage devices

    公开(公告)号:US11797452B2

    公开(公告)日:2023-10-24

    申请号:US17867074

    申请日:2022-07-18

    CPC classification number: G06F12/0866 G06F12/123 G06F2212/224 G06F2212/313

    Abstract: Various implementations described herein relate to systems and methods for dynamically managing buffers of a storage device, including receiving, by a controller of the storage device from a host, information indicative of a frequency by which data stored in the storage device is accessed, and in response to receiving the information determining, by the controller, the order by which read buffers of the storage device are allocated for a next read command. The NAND read count of virtual Word-Lines (WLs) are also used to cache more frequently accessed WLs, thus proactively reducing read disturb and consequently increasing NAND reliability and NAND life.

    SSD supporting deallocate summary bit table and associated SSD operations

    公开(公告)号:US11669254B2

    公开(公告)日:2023-06-06

    申请号:US17491123

    申请日:2021-09-30

    CPC classification number: G06F3/0631 G06F3/0604 G06F3/0659 G06F3/0679

    Abstract: The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event. The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.

    SSD supporting deallocate summary bit table and associated SSD operations

    公开(公告)号:US12223187B2

    公开(公告)日:2025-02-11

    申请号:US18195565

    申请日:2023-05-10

    Abstract: The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event, The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.

    Validity table for solid state drives

    公开(公告)号:US11977773B2

    公开(公告)日:2024-05-07

    申请号:US17491156

    申请日:2021-09-30

    Abstract: A method performed by a controller of a solid-state drive (SSD) comprising splitting a logical to physical mapping table in a non-volatile semiconductor memory device of the SSD into a plurality of regions, each of the regions associated with a plurality of logical cluster addresses (LCAs), determining if the mapping table for each region contains an entry with a valid address, setting a validity status in a validity bit for a region of the plurality of regions if the mapping table for the region contains any mapped addresses, and storing the validity bit for each region in a validity bitmap table (VBT).

    DYNAMIC BUFFER CACHING OF STORAGE DEVICES

    公开(公告)号:US20220350746A1

    公开(公告)日:2022-11-03

    申请号:US17867074

    申请日:2022-07-18

    Abstract: Various implementations described herein relate to systems and methods for dynamically managing buffers of a storage device, including receiving, by a controller of the storage device from a host, information indicative of a frequency by which data stored in the storage device is accessed, and in response to receiving the information determining, by the controller, the order by which read buffers of the storage device are allocated for a next read command. The NAND read count of virtual Word-Lines (WLs) are also used to cache more frequently accessed WLs, thus proactively reducing read disturb and consequently increasing NAND reliability and NAND life.

Patent Agency Ranking