公开(公告)号：US20220270660A1

公开(公告)日：2022-08-25

申请号：US17674301

申请日：2022-02-17

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Yang-Kyu CHOI ,  Myung-Su KIM

IPC: G11C11/404 ,  G11C11/4096

Abstract: Disclosed are a DRAM device capable of storing charges for a long time and an operating method thereof. According to an embodiment, a DRAM device includes a channel region formed on a substrate, a gate insulating film region formed on the channel region, a floating gate region formed on the gate insulating film region, a transition layer region formed on the floating gate region, and a control gate region formed on the transition layer region and generating a potential difference with the floating gate region in response to a fact that a potential that is not less than a reference potential is applied and releasing at least one charge stored in the floating gate region or storing the at least one charge into the floating gate region, by generating a transition current due to the potential difference.

公开(公告)号：US20220270676A1

公开(公告)日：2022-08-25

申请号：US17674272

申请日：2022-02-17

Applicant: Korea Advanced Institute of Science and Technology

Inventor： Yang-Kyu CHOI ,  Myung-Su KIM

IPC: G11C11/54 ,  G11C16/04 ,  H01L29/788 ,  H01L29/66

Abstract: Disclosed are a neuromorphic synapse device having an excellent linearity characteristic, and an operating method thereof. According to an embodiment, a neuromorphic synapse device includes a channel region formed on a substrate, a gate insulating film region formed on the channel region, a floating gate region formed on the gate insulating film region, a charge transfer layer region formed on the floating gate region, and a control gate region, which is formed on the charge transfer layer region and which generates a potential difference with the floating gate region in response to a fact that a potential that is not less than a reference potential is applied, and performs a weight update operation by releasing at least one charge stored in the floating gate region or storing the at least one charge into the floating gate region by using the potential difference.