公开(公告)号：US20090152644A1

公开(公告)日：2009-06-18

申请号：US12349348

申请日：2009-01-06

申请人： Kozo WATANABE ,  Shoji YOSHIDA ,  Masashi SAHARA ,  Shinichi TANABE ,  Takashi HASHIMOTO

发明人： Kozo WATANABE ,  Shoji YOSHIDA ,  Masashi SAHARA ,  Shinichi TANABE ,  Takashi HASHIMOTO

IPC分类号： H01L27/06

CPC分类号： H01L29/872 ,  H01L27/0629 ,  H01L28/20 ,  H01L29/7833

摘要： A technology is provided where a high performance Schottky-barrier diode and other semiconductor elements can be formed in the same chip controlling the increase in the number of steps. After a silicon oxide film is deposited over a substrate where an n-channel type MISFET is formed and the silicon oxide film over a gate electrode and n+ type semiconductor region is selectively removed, a Co film is deposited over the substrate and a CoSi2 layer is formed over the n+ type semiconductor region and the gate electrode by applying a heat treatment to the substrate. After a silicon nitride film is deposited over the substrate and an aperture reaching the substrate is formed by removing the silicon nitride film and the silicon oxide film at the anode formation part of the Schottky barrier diode, a Ti film is deposited over the substrate including the inside of the aperture, and a TiSi2 layer which becomes an anode electrode of the Schottky-barrier diode is formed at the bottom of the aperture by applying a heat treatment to the substrate.

摘要翻译： 提供了一种技术，其中可以在同一芯片中形成高性能肖特基势垒二极管和其他半导体元件，以控制步骤数量的增加。 在氧化硅膜沉积在其上形成n沟道型MISFET的衬底上并且选择性地去除栅电极和n +型半导体区上的氧化硅膜之后，在衬底上沉积Co膜，并且CoSi 2层是 通过对基板进行热处理而形成在n +型半导体区域和栅电极之上。 在氮化硅膜沉积在衬底上之后，通过去除肖特基势垒二极管的阳极形成部分处的氮化硅膜和氧化硅膜来形成到达衬底的孔径，在衬底上沉积Ti膜 在孔的内侧，通过对基板进行热处理，在孔的底部形成成为肖特基势垒二极管的阳极的TiSi 2层。