公开(公告)号：US08358162B2

公开(公告)日：2013-01-22

申请号：US13050414

申请日：2011-03-17

Applicant: Kyoung Tae Kang

Inventor： Kyoung Tae Kang

IPC: H03K3/017

CPC classification number: H03K5/1565

Abstract: A buffer circuit includes an amplifier circuit amplifying a difference between an input signal and a reference signal, providing a branch current that varies with a duty cycle of the input signal, and outputting a preliminary output signal on the basis of the amplified difference. The buffer circuit also includes a charge pump circuit charging/discharging a control node in response to the branch current to provide a control signal. The buffer circuit also includes a driver circuit configured to control pull-up strength and pull-down strength for the preliminary output signal based on control signal to thereby correct the duty cycle of the preliminary output signal in relation to a target duty cycle.

Abstract translation: 缓冲电路包括放大输入信号和参考信号之间的差的放大电路，提供随输入信号的占空比变化的分支电流，并基于放大的差输出初步输出信号。 缓冲电路还包括电荷泵电路，以响应于分支电流对控制节点进行充电/放电以提供控制信号。 缓冲电路还包括驱动器电路，其配置为基于控制信号控制初步输出信号的上拉强度和下拉强度，从而相对于目标占空比校正初步输出信号的占空比。