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公开(公告)号：US12284084B2
公开(公告)日：2025-04-22
申请号：US17318963
申请日：2021-05-12
Applicant: L3Harris Technologies, Inc.
Inventor： Kyle R. Morrey , Christopher S. Heffernan , Seth J. Thorup , Stephen N. Jenkins , Stephen M. Dudley
IPC: H04L41/14 , G06F9/455 , G06F30/331 , G06F30/347 , H04L45/586 , H04L45/60 , H04L69/08
Abstract: A hardware system for simulating a network physical layer for communication channels. The hardware system includes a plurality of hardware processors configurable to model a network physical layer and communication channels. The hardware system is further implemented where the hardware processors are configured such that a single set of hardware, including a single set of gates and registers, is used in a single simulation to model a plurality of virtual routers for different nodes.
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公开(公告)号：US11757726B2
公开(公告)日：2023-09-12
申请号：US17318923
申请日：2021-05-12
Applicant: L3Harris Technologies, Inc.
Inventor： Seth J. Thorup , Kyle R. Morrey , Stephen N. Jenkins , Brent A. Kenney , Benjamin C. Dean , Lee F. Carter
IPC: H04L41/14
CPC classification number: H04L41/145
Abstract: A hardware system for simulating a network physical layer for communication channels. The hardware system includes a plurality of hardware processors configurable to model a physical layer and communication channels. The hardware system includes a first interface coupled to the plurality of hardware processors. The first interface is configured to be coupled to a software simulator comprising a physics model configured to provide model parameters based on modeled communication hardware and a temporal modeling scenario. A second interface is coupled to the plurality of hardware processors. The second interface is configured to be coupled to simulated or real nodes for sending and receiving network data to and from the nodes. The hardware processors are configured to model effects of the physical layer and communication channels on the network data.
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公开(公告)号：US11683239B2
公开(公告)日：2023-06-20
申请号：US17318937
申请日：2021-05-12
Applicant: L3Harris Technologies, Inc.
Inventor： Seth J. Thorup , Kyle R. Morrey , Stephen N. Jenkins , Brent A. Kenney
CPC classification number: H04L41/145 , H04L47/32
Abstract: A system for simulating lost data packets. The system includes a first hardware register storing data for fast factors. The fast factors include factors that are time independent with respect to particular data packets. A second hardware register stores slow factors. The slow factors include factors that are time dependent on data packets. Synchronization hardware is coupled to the second hardware register and synchronizes the slow factors with specific data inputs based on dependencies on the data packets. A hardware adder is coupled to the first hardware register and the second hardware register to compute a link budget. The link budget is used in determine probability of loss of data packets. A hardware processor coupled to the hardware adder determines, based on the link budget, if a data packet should be dropped, and when the data packet should be dropped, drops the data packet for simulating a network physical layer.
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公开(公告)号：US11570056B2
公开(公告)日：2023-01-31
申请号：US17318960
申请日：2021-05-12
Applicant: L3Harris Technologies, Inc.
Inventor： Stephen N. Jenkins , Kyle R. Morrey , Seth J. Thorup , Alex J. Marcum , David A. Reed
Abstract: A hardware system for simulating a network physical layer for communication channels. The hardware system includes a plurality of hardware processors configurable to model a network physical layer and communication channels. The hardware system further includes a multi-point data switch configured to be coupled to various data log points associated with the plurality of hardware processors. The hardware system further includes a RAM coupled to the multi-point data switch, where the RAM is configured to store log data provided by the multi-point data switch as software defined data structures.
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