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公开(公告)号：US11741915B2
公开(公告)日：2023-08-29
申请号：US17828032
申请日：2022-05-31
发明人： Kenichi Shiibayashi , Keigo Otani
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2310/0291 , G09G2320/0242
摘要： The disclosure includes bus wiring constituted by wiring lines; a gradation voltage generation circuit that generates M gradation voltages representing brightness levels with M gradations, and applies the M gradation voltages to an intermediate portion on M wiring lines belonging to the bus wiring; a plurality of decoders, each of which receives M gradation voltages via the M wiring lines and selects one of the M gradation voltages according to the pixel data pieces to output the selected gradation voltage; a plurality of output amplifiers that individually amplifies the voltages output from the plurality of decoders and generates the amplified voltages as the plurality of pixel drive voltages; and first and second inter-gradation short circuits that short-circuit one ends of each of the M wiring lines and the other ends of each of the M wiring lines according to a load signal for capturing the pixel data pieces.
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公开(公告)号：US11373616B2
公开(公告)日：2022-06-28
申请号：US17110309
申请日：2020-12-03
发明人： Kenichi Shiibayashi , Keigo Otani
IPC分类号： G09G3/36
摘要： The disclosure includes bus wiring constituted by wiring lines; a gradation voltage generation circuit that generates M gradation voltages representing brightness levels with M gradations, and applies the M gradation voltages to an intermediate portion on M wiring lines belonging to the bus wiring; a plurality of decoders, each of which receives M gradation voltages via the M wiring lines and selects one of the M gradation voltages according to the pixel data pieces to output the selected gradation voltage; a plurality of output amplifiers that individually amplifies the voltages output from the plurality of decoders and generates the amplified voltages as the plurality of pixel drive voltages; and first and second inter-gradation short circuits that short-circuit one ends of each of the M wiring lines and the other ends of each of the M wiring lines according to a load signal for capturing the pixel data pieces.
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