公开(公告)号：US09209414B2

公开(公告)日：2015-12-08

申请号：US14552147

申请日：2014-11-24

Applicant: LG DISPLAY CO., LTD.

Inventor： Yu Sok Lim ,  Byung Chul Ahn ,  Chang Dong Kim ,  Tae Joon Ahn ,  Sang Moo Song

IPC: H01L51/00 ,  H01L27/32 ,  H01L51/52

CPC classification number: H01L51/0097 ,  H01L27/3244 ,  H01L51/524 ,  H01L51/5253 ,  H01L51/5281 ,  H01L2251/5338 ,  Y02E10/549

Abstract: A display device is discussed which can include: a flexible substrate defined into a first area, a second area bent from an edge of the first area, and a third area outwardly expanded from the second area; a thin film transistor layer disposed on the substrate; an organic emission layer disposed on the thin film transistor layer; an encapsulation layer disposed on the organic emission layer; a polarization layer disposed on the encapsulation layer; and a cover window disposed on the polarization layer. The polarization layer is formed on the encapsulation layer opposite to the first and third areas of the substrate.

Abstract translation: 讨论了一种显示装置，其可以包括：限定在第一区域中的柔性基板，从第一区域的边缘弯曲的第二区域和从第二区域向外扩展的第三区域; 设置在所述基板上的薄膜晶体管层; 设置在所述薄膜晶体管层上的有机发射层; 设置在有机发光层上的封装层; 设置在所述封装层上的极化层; 以及设置在所述偏振层上的盖窗。 偏振层形成在与衬底的第一和第三区域相对的封装层上。

公开(公告)号：US11017721B2

公开(公告)日：2021-05-25

申请号：US16633110

申请日：2018-07-31

Applicant: LG Display Co., Ltd.

Inventor： So Hyun Kim ,  Yu Sok Lim

IPC: G09G3/3258 ,  G09G3/325 ,  G09G3/3275 ,  H01L27/32

Abstract: The present disclosure relates to an organic light emitting display device including a display panel on which a plurality of data lines, a plurality of gate lines, a plurality of first power lines, a plurality of second power lines, and a plurality of pixels are disposed. Each of the plurality of pixels includes: a storage capacitor connected between a first node and a second node; a driving transistor including a gate electrode connected to the second node, a drain electrode connected to the power line, and a source electrode connected to the first node; an organic light emitting diode connected to the first node and the second power line; a first switching transistor connected to the second node and the data lines; and a second switching transistor connected to the first node and the first power lines.

公开(公告)号：US10176746B2

公开(公告)日：2019-01-08

申请号：US15387056

申请日：2016-12-21

Applicant: LG DISPLAY CO., LTD.

Inventor： Yu Sok Lim ,  Hyerin Kim

IPC: G09G3/00 ,  G09G3/20 ,  G11C19/28

Abstract: Provided is a gate driver and a method of driving the same, which enables a voltage level of a Q node to be stably maintained in a blank section by: inputting a clock signal that directly provides a high level to the Q node through a reset signal input end of a reset signal for resetting the Q node of a gate driver integrated circuit; inputting a reset signal for each blank section between frames; or providing a higher gate high voltage and a lower gate low voltage. There may be provided a gate driver integrated circuit that has a robust structure with high reliability and avoids an error of a scan signal by maintaining the voltage level of the Q node to be stable in the blank section, and a method of driving the same.