DISPLAY PANEL AND DISPLAY APPARATUS
    1.
    发明公开

    公开(公告)号:US20240260423A1

    公开(公告)日:2024-08-01

    申请号:US18427328

    申请日:2024-01-30

    CPC classification number: H10K59/879 H10K59/131

    Abstract: A display panel in one example includes pixel blocks having subpixels disposed in a display area, a bezel area disposed outside the display area, and mode control line sets individually connected to pixel blocks. Each mode control line set includes a first mode control line for supplying a first mode control signal and a second mode control line for supplying a second mode control signal. Each subpixel includes a driving transistor connected to a first power line, a first light emitting device connected to the driving transistor through a first mode control transistor controlled by the first mode control signal, a second light emitting device connected to the driving transistor through a second mode control transistor controlled by the second mode control signal, a first lens region disposed on the first light emitting device, and a second lens region disposed on the second light emitting device.

    PHOTO DETECTING APPARATUS AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20190103436A1

    公开(公告)日:2019-04-04

    申请号:US16123616

    申请日:2018-09-06

    Abstract: Provided is a photo detecting apparatus. The photo detecting apparatus includes a thin film transistor array on a first surface of a substrate having a specific light transmissivity and a photo diode structure between the first surface and the thin film transistor array. The photo diode structure is implemented to receive and process an electromagnetic radiation through a second surface of the substrate.

    PIXEL CIRCUIT AND DISPLAY APPARATUS COMPRISING PIXEL CIRCUIT

    公开(公告)号:US20230386407A1

    公开(公告)日:2023-11-30

    申请号:US18202064

    申请日:2023-05-25

    CPC classification number: G09G3/3233 H10K77/111

    Abstract: A pixel circuit can include a capacitor connected between a first node and a second node, a first transistor connected between a data line and the first node, a driving transistor including a gate electrode connected to the second node, a first electrode connected to a first voltage supply line, and a second electrode connected to a third node, a second transistor connected between the second node and a fourth node, the fourth node being connected to a reference voltage supply line, a third transistor connected between the fourth node and a fifth node, and an emission element connected to the driving transistor and connected to the third transistor through the fifth node.

    PIXEL CIRCUIT AND DISPLAY APPARATUS COMPRISING PIXEL CIRCUIT

    公开(公告)号:US20240087525A1

    公开(公告)日:2024-03-14

    申请号:US18462132

    申请日:2023-09-06

    Abstract: According to an aspect of the present disclosure, a pixel circuit includes a first capacitor connected between a first node and a second node, a first transistor connected to the first node and supplied with a first scan signal, a driving transistor including a gate electrode connected to the second node, a first electrode connected to a first voltage supply line, and a second electrode connected to a third node, a second transistor connected between the second node and the third node and supplied with a second scan signal, a third transistor connected between the third node and a fourth node, a fourth transistor which is connected to the fourth node and is supplied with a second scan signal of a previous pixel row and a light emitting diode connected to the fourth transistor and the third transistor at the fourth node.

    ELECTROLUMINESCENCE DISPLAY DEVICE

    公开(公告)号:US20220172681A1

    公开(公告)日:2022-06-02

    申请号:US17500265

    申请日:2021-10-13

    Abstract: An electroluminescence display device comprises a light emitting diode having an anode connected to a node A, and a pixel driving circuit supplying a driving current to the node A and including a node B, a node C and a node D. The pixel driving circuit includes a driving transistor controlled by a voltage supplied to the node B, a first transistor turned on by a first scan signal, supplying a data voltage to the node C, a second transistor turned on by a second scan signal, electronically connecting the node B with the node C, a third transistor turned on by an emission signal, electronically connecting the node D with a node E, a fourth transistor turned on by a C signal, supplying a reference voltage to the node E, a storage capacitor connected to the node B and the node D, and a capacitor connected to the node C and a reference voltage line to which the reference voltage is supplied. In this case, the emission signal includes a pulse overlapping with the first scan signal and the second scan signal, and the C signal includes a pulse overlapping with the emission signal without overlapping with the first scan signal and the second scan signal.

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