公开(公告)号：US11244645B2

公开(公告)日：2022-02-08

申请号：US16929810

申请日：2020-07-15

Applicant: LG Display Co., Ltd.

Inventor： Se-Dong Park ,  Soon-Dong Cho ,  Dong-Ju Kim ,  Hee-Jung Hong ,  Jung-Jae Kim

IPC: G09G3/36 ,  G09G3/3266 ,  G09G3/3275

Abstract: A display device includes a display panel and a level shifter. The display panel displays images. The level shifter includes a signal pad through which a clock signal to drive the display panel is output and a reverse signal pad through which a reverse clock signal different from the clock signal is output, and the reverse signal pad is in an electrically floated state.

公开(公告)号：US10726787B2

公开(公告)日：2020-07-28

申请号：US16213907

申请日：2018-12-07

Applicant: LG Display Co., Ltd.

Inventor： Soon-Dong Cho ,  Jae-Won Han ,  Jun-O Hur ,  Dong-Ju Kim

IPC: G09G3/3258 ,  G09G3/3291 ,  G09G3/3275 ,  G09G3/3266 ,  G09G3/36 ,  G02F1/1345

Abstract: A chip on film and a display device including the same selectively outputs gate transmission signals and data outputs to reduce the number of output pads in a data driving IC. The COF includes first to third groups of data input pads, gate input pads, and output pads. A data driving IC includes first to third groups of output buffers, a first switchable output unit configured to selectively supply gate transmission signals and an output of the first group of output buffers to the first group of output pads, and a second switchable output unit configured to selectively supply the gate transmission signals and an output of the third group of output buffers to the third group of output pads. An output of the second group of output buffers is supplied to the second group of output pads between the first and the third groups of output pads.

公开(公告)号：US10444881B2

公开(公告)日：2019-10-15

申请号：US15812702

申请日：2017-11-14

Applicant: LG Display Co., Ltd.

Inventor： Hoon Jang ,  Soon-Dong Cho ,  Juno Hur ,  Dong-Ju Kim ,  Won-Yong Jang

IPC: G06F3/041 ,  G06F3/044 ,  H03F3/45 ,  G09G3/36

Abstract: Disclosed are a touch power circuit and a touch display device in which an operational amplifier buffers an input pulse having a first voltage and a higher second voltage alternate, and uses the buffered input pulse to provide an output pulse. The operational amplifier includes a non-inverting input terminal to which the input pulse is supplied, an inverting input terminal connected to the output terminal, and an output unit driven according to a result of amplifying a difference between a voltage of the non-inverting input terminal and a voltage of the inverting input terminal and configured to charge and discharge the output terminal. The circuits and devices may further include an offset voltage applier configured to supply an offset voltage having a first polarity to the non-inverting input terminal and/or the inverting input terminal to level-shift the input pulse.