公开(公告)号：US09620240B2

公开(公告)日：2017-04-11

申请号：US14290808

申请日：2014-05-29

Applicant: LG Display Co., Ltd.

Inventor： Byeong-Seong So ,  Joung-Mi Choi

IPC: G11C19/28 ,  G09G3/36

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G2310/0286

Abstract: Disclosed is a shift register including stages for sequentially outputting output pulses including carry and scan pulses. Odd-numbered stages supply corresponding scan pulses to odd-numbered gate lines in a sequential manner, and even-numbered stages supply corresponding scan pulses to even-numbered gate lines in a sequential manner. Each stage includes a carry output unit for generating a carry pulse, based on a first discharge voltage and a clock pulse having a low-level voltage equal to the first discharge voltage, and supplying the carry pulse to at least one of upstream and downstream stages, and a scan output unit for generating a scan pulse, based on a second discharge voltage having a higher voltage than the first discharge voltage and the clock pulse, and supplying the scan pulse to a corresponding gate line.