Abstract:
An LCD device and a method for manufacturing the same are disclosed, which can reduce resistance of a common electrode formed on an upper substrate. The LCD device includes first and second substrates facing to each other, a plurality of color filter films formed in each pixel region on the first substrate, a plurality of gate and data lines formed on the color filter films to cross one another to define the pixel regions, a plurality of TFTs formed at crossing points of the plurality of gate and data lines, a plurality of pixel electrodes formed in the pixel regions on the first substrate, a plurality of island shaped first black matrix films formed on portions of the second substrate corresponding to the TFTs, and a plurality of common electrodes formed on an entire surface of the second substrate including the first black matrix films.
Abstract:
A method for fabricating a liquid crystal display panel is provided. A thin film transistor array is formed on a lower substrate, and a color filter array is formed on an upper substrate. The thin film transistor array has gate lines, data lines, data pads, thin film transistors and pixel electrodes. After the upper substrate and lower substrates are bonded together and cut into cells, the gate pads and the data pads at ends of the gate lines and the data lines on the lower substrate of the bonded substrates are exposed.
Abstract:
A liquid crystal display panel having a light impermeable layer with alignment marks is disclosed in the present invention. The panel includes a light impermeable layer on a substrate, a plurality of alignment marks around at least first and second corners of the substrate, the first and second corners being separated from each other in a diagonal direction, and a plurality of color filter layers on light impermeable layer.
Abstract:
A liquid crystal display device includes a plurality of gate lines and data lines arranged horizontally and vertically, respectively, for defining a plurality of pixel areas; a plurality of switching devices formed at intersections of the gate lines and the data lines; and a pixel electrode formed in a pixel area connected to the switching device corresponding to the pixel area and partially overlapping the data lines adjacent to the corresponding pixel area, wherein a first parasitic capacitance generated by the pixel electrode overlapping a data line for the corresponding pixel area and a second parasitic capacitance generated the pixel electrode overlapping a data line for an adjacent pixel area are substantially equal to each other.