公开(公告)号：US20030194839A1

公开(公告)日：2003-10-16

申请号：US10407276

申请日：2003-04-07

Applicant: LG.Philips LCD Co. Ltd.

Inventor： Hoon-Ju Chung

IPC: H01L021/00 ,  H01L027/01 ,  H01L031/0392

CPC classification number: H01L29/78696 ,  H01L29/66772 ,  H01L29/78621 ,  H01L29/78645

Abstract: A thin film transistor device includes a substrate, a buffer layer on the substrate, an active layer on the buffer layer, the active layer is formed of polycrystalline silicon and includes first undoped areas, a second lightly doped area, and third highly doped areas, a gate insulation layer on the buffer layer, a dual-gate electrode on the gate insulation layer including first and second gate electrodes corresponding to the first areas, an interlayer insulator on the gate insulation layer covering the dual-gate electrode, source and drain contact holes exposing the third areas, a gate contact hole penetrating the interlayer insulator to expose a portion of the dual-gate electrode, source and drain electrodes on the interlayer insulator contacting the third areas through the source and drain contact holes, and a third gate electrode on the interlayer insulator contacting the exposed portion of the dual-gate electrode through the gate contact hole.

Abstract translation: 薄膜晶体管器件包括衬底，衬底上的缓冲层，缓冲层上的有源层，有源层由多晶硅形成，并且包括第一未掺杂区域，第二轻掺杂区域和第三高掺杂区域， 在所述缓冲层上的栅绝缘层，所述栅极绝缘层上的双栅电极，包括对应于所述第一区的第一和第二栅电极，所述栅极绝缘层上的覆盖所述双栅电极的层间绝缘体，源漏漏触点 暴露第三区域的孔，穿过层间绝缘体的栅极接触孔，以暴露双栅电极的一部分，通过源极和漏极接触孔与第三区域接触的层间绝缘体上的源极和漏极，以及第三栅电极 在层间绝缘体上通过栅极接触孔接触双栅电极的暴露部分。