LIGHT EMITTING DISPLAY DEVICE
    1.
    发明公开

    公开(公告)号:US20240071294A1

    公开(公告)日:2024-02-29

    申请号:US18338856

    申请日:2023-06-21

    CPC classification number: G09G3/32 G09G3/2096 G09G2330/021

    Abstract: A light emitting display device includes a substrate, a drive power circuit, a gate circuit unit, multiple LEDs and a power switch unit. The power switch unit includes multiple first transistor switches and at least one second transistor switch that cooperatively control current flows through the LEDs. The first transistor switches are respectively connected to first terminals of the LEDs. The at least one second transistor switch is connected to second terminals of the LEDs. The first transistor switches are further connected to the drive power circuit to receive multiple drive currents, and are further connected to the gate circuit unit to receive a timing input. The at least one second transistor switch is further connected to the gate circuit unit to receive a timing input. The light emitting display device can have reduced parasitic capacitance effect, and thus reduced power consumption and have improved display quality.

    LIGHT EMITTING DIODE DISPLAY DEVICE
    2.
    发明公开

    公开(公告)号:US20240071287A1

    公开(公告)日:2024-02-29

    申请号:US18338817

    申请日:2023-06-21

    CPC classification number: G09G3/2096 G09G3/32 G09G2300/0426 G09G2330/021

    Abstract: An LED display device includes a system board, and multiple daughterboards that are assembled on the system board. The system board includes a drive power circuit, a first gate circuit and a second gate circuit. Each daughterboard includes a substrate, multiple LEDs that are disposed on the substrate, multiple first transistor switches that are respectively connected to the LEDs, and at least one second transistor switch that is connected to the LEDs. With respect to each daughterboard, the first transistor switches and the at least one second transistor switch cooperatively control current flows through the LEDs; the first transistor switches are further connected to the drive power circuit to respectively receive multiple drive currents, and are further connected to the first gate circuit to receive a timing signal; and the at least one second transistor switch is further connected to the second gate circuit to receive a timing signal.

    METHOD FOR PACKAGING INTEGRATED CIRCUIT CHIP

    公开(公告)号:US20210257222A1

    公开(公告)日:2021-08-19

    申请号:US17248374

    申请日:2021-01-22

    Abstract: A method for packaging an integrated circuit chip includes the steps of: a) providing a plurality of dies and a lead frame which includes a plurality of bonding parts each having a die pad, a plurality of leads each having an end region disposed on and connected to the die pad, and a plurality of bumps each disposed on the end region of a respective one of the leads; b) transferring each of the dies to the die pad of a respective one of the bonding parts to permit each of the dies to be flipped on the respective bonding part; and c) hot pressing each of the dies and the die pad of a respective one of the bonding parts to permit each of the dies to be bonded to the bumps of the respective bonding part.

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