公开(公告)号：US20130120958A1

公开(公告)日：2013-05-16

申请号：US13676098

申请日：2012-11-14

Applicant: MEDIATEK INC.

Inventor： Long-Kun Yu ,  Kuo-Liang Deng

IPC: H05K9/00

CPC classification number: H05K9/0066

Abstract: A method for performing chip level electromagnetic interference (EMI) reduction is provided, where the method is applied to an electronic device. The method includes: providing at least one EMI suppression circuit within at least one chip of the electronic device; and utilizing the at least one EMI suppression circuit within the at least one chip to perform EMI reduction on at least one signal within the at least one chip. In particular, the at least one chip includes a first chip and a second chip; and the at least one EMI suppression circuit includes a first EMI suppression circuit positioned within the first chip, and further includes a second EMI suppression circuit positioned within the second chip. An associated apparatus is also provided.

Abstract translation: 提供了一种用于执行芯片级电磁干扰（EMI）减小的方法，其中该方法应用于电子设备。 该方法包括：在电子设备的至少一个芯片内提供至少一个EMI抑制电路; 以及利用所述至少一个芯片内的所述至少一个EMI抑制电路对所述至少一个芯片内的至少一个信号执行EMI降低。 特别地，至少一个芯片包括第一芯片和第二芯片; 并且所述至少一个EMI抑制电路包括位于所述第一芯片内的第一EMI抑制电路，并且还包括位于所述第二芯片内的第二EMI抑制电路。 还提供了一种相关联的装置。

公开(公告)号：US09204581B2

公开(公告)日：2015-12-01

申请号：US13676098

申请日：2012-11-14

Applicant: MEDIATEK INC.

Inventor： Long-Kun Yu ,  Kuo-Liang Deng

IPC: H05K9/00

CPC classification number: H05K9/0066

Abstract: A method for performing chip level electromagnetic interference (EMI) reduction is provided, where the method is applied to an electronic device. The method includes: providing at least one EMI suppression circuit within at least one chip of the electronic device; and utilizing the at least one EMI suppression circuit within the at least one chip to perform EMI reduction on at least one signal within the at least one chip. In particular, the at least one chip includes a first chip and a second chip; and the at least one EMI suppression circuit includes a first EMI suppression circuit positioned within the first chip, and further includes a second EMI suppression circuit positioned within the second chip. An associated apparatus is also provided.

Abstract translation: 提供了一种用于执行芯片级电磁干扰（EMI）减小的方法，其中该方法应用于电子设备。 该方法包括：在电子设备的至少一个芯片内提供至少一个EMI抑制电路; 以及利用所述至少一个芯片内的所述至少一个EMI抑制电路对所述至少一个芯片内的至少一个信号执行EMI降低。 特别地，至少一个芯片包括第一芯片和第二芯片; 并且所述至少一个EMI抑制电路包括位于所述第一芯片内的第一EMI抑制电路，并且还包括位于所述第二芯片内的第二EMI抑制电路。 还提供了一种相关联的装置。