公开(公告)号：US20250165401A1

公开(公告)日：2025-05-22

申请号：US18512038

申请日：2023-11-17

Applicant: MEDIATEK INC.

Inventor： Ying-Lin Liu ,  Chung-Lun Huang ,  Shih-Chang Lin ,  Yu-Cheng Lin ,  Lin Liu

IPC: G06F12/0804 ,  G06F12/0873

Abstract: A memory management circuit, an electronic device and a memory management method are provided. The memory management circuit includes a controller and an address mapping logic. The controller records addresses of available storage spaces within a memory device, wherein a searching logic of the controller stores the addresses in a storage device, and the addresses are queued with a specific order in the storage device. When a computing circuit send a storage request to request for a storage resource, the searching logic obtains at least one address queued in the storage device according to the specific order of the addresses queued in the storage device, to accordingly generate a mapping table, and the address mapping logic performs an address mapping operation upon the storage request according to the mapping table, to allow the computing circuit to utilize the available storage spaces according to the mapping table.