公开(公告)号：US20240265992A1

公开(公告)日：2024-08-08

申请号：US18402096

申请日：2024-01-02

Applicant: MICRON TECHNOLOGY, INC.

Inventor： YASUSHI MATSUBARA ,  MINORU SOMEYA

IPC: G11C29/00 ,  G11C17/18 ,  G11C29/44

CPC classification number: G11C29/787 ,  G11C17/18 ,  G11C29/44 ,  G11C29/76

Abstract: An apparatus includes a memory chip including a plurality of fuse units, and a controller chip. Each fuse unit includes a fuse array having a plurality of fuse cells, a first register, and a second register. The controller is configured to set the fuse address in the second register included in selected one or more of the plurality of fuse units, set the match signal in the first register included in the selected one or more of the plurality of fuse units, and send a blow signal to the memory chip. Each of the selected one or more of the plurality of fuse units is configured to blow one of the plurality of fuse cells selected by the fuse address stored in the second register responsive to the blow signal.