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公开(公告)号:US12044647B2
公开(公告)日:2024-07-23
申请号:US17656332
申请日:2022-03-24
申请人: MINEBEA MITSUMI Inc.
发明人: Fumihiro Inoue , Shinya Otsuka , Kosuke Yamamoto
IPC分类号: G01N27/22
CPC分类号: G01N27/226 , G01N27/223 , G01N27/228
摘要: A switched capacitor circuit includes a first charge-to-voltage converter including a first capacitor to operate in a first period to convert a first charge into a first output voltage. The switched capacitor circuit includes a second charge-to-voltage converter including a second capacitor to operate in a second period to convert a second charge into a second output voltage, the second period being different from the first period. The switched capacitor circuit includes a shield interconnect disposed between the first capacitor and the second capacitor, the shield interconnect having a constant potential.
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公开(公告)号:US12047092B2
公开(公告)日:2024-07-23
申请号:US17906511
申请日:2021-03-26
申请人: MINEBEA MITSUMI Inc.
发明人: Shinya Otsuka , Kosuke Yamamoto
IPC分类号: H03M13/09
CPC分类号: H03M13/096
摘要: A checksum addition method includes obtaining a command and an address transmitted from a request source; reading data from the address according to the command; calculating a checksum to be added to the data; and transmitting the checksum and the data to the request source, wherein the calculating calculates the checksum in a data unit according to a type of the command.
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公开(公告)号:US11313824B2
公开(公告)日:2022-04-26
申请号:US16681015
申请日:2019-11-12
申请人: MINEBEA MITSUMI Inc.
发明人: Fumihiro Inoue , Shinya Otsuka , Kosuke Yamamoto
IPC分类号: G01N27/22
摘要: The detecting device includes a detecting unit including a first electrode and a second electrode, the first electrode and the second electrode being used as a first capacitor. The detecting device includes a drive unit configured to apply a first drive signal to the first drive terminal such that the first drive signal is alternately inverted between a first period and a second period. The detecting device includes a converting unit configured to convert a charge charged at the signal terminal into a voltage and includes a difference processing unit configured to obtain a difference between the first output voltage and the second output voltage.
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