公开(公告)号：US20140153582A1

公开(公告)日：2014-06-05

申请号：US14175142

申请日：2014-02-07

Applicant: MOSAID Technologies Incorporated

Inventor： David E. JONES

IPC: H04L12/865

CPC classification number: H04L47/6275 ,  H04L47/2441 ,  H04L47/6215 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9021

Abstract: The present invention generally provides a packet buffer random access memory (PBRAM) device including a memory array, a plurality of input ports, and a plurality of serial registers associated with the input ports. The plurality of input ports permit multiple devices to concurrently access the memory in a non-blocking manner. The serial registers enable receiving data from the input ports and concurrently packet data to the memory array. The memory performs all management of network data queues so that all port requests can be satisfied within the real-time constraints of network packet switching.

Abstract translation: 本发明通常提供包括存储器阵列，多个输入端口和与输入端口相关联的多个串行寄存器的分组缓冲器随机存取存储器（PBRAM）装置。 多个输入端口允许多个设备以非阻塞的方式同时访问存储器。 串行寄存器允许从输入端口接收数据，并将数据包同时发送到存储器阵列。 存储器执行网络数据队列的所有管理，使得可以在网络分组交换的实时约束内满足所有端口请求。